欢迎访问ic37.com |
会员登录 免费注册
发布采购

LNK3206G-TL 参数 Datasheet PDF下载

LNK3206G-TL图片预览
型号: LNK3206G-TL
PDF下载: 下载PDF文件 查看货源
内容描述: [IC OFFLN CONV MULT TOP 8SMD]
分类和应用: 开关光电二极管
文件页数/大小: 22 页 / 1875 K
品牌: POWERINT [ Power Integrations ]
 浏览型号LNK3206G-TL的Datasheet PDF文件第4页浏览型号LNK3206G-TL的Datasheet PDF文件第5页浏览型号LNK3206G-TL的Datasheet PDF文件第6页浏览型号LNK3206G-TL的Datasheet PDF文件第7页浏览型号LNK3206G-TL的Datasheet PDF文件第9页浏览型号LNK3206G-TL的Datasheet PDF文件第10页浏览型号LNK3206G-TL的Datasheet PDF文件第11页浏览型号LNK3206G-TL的Datasheet PDF文件第12页  
LNK3202/3204-6  
Topology  
Basic Circuit Schematic  
Key Features  
1. Output referenced to input  
+
2. Positive output (VO) with respect to +VIN  
3. Step up/down – VO > VIN or VO < VIN  
4. Optocoupler feedback  
Low-Side  
LinkSwitch-TN2  
VIN  
VO  
Buck-Boost –  
Optocoupler  
Feedback  
- Accuracy only limited by reference choice  
- Low cost non-safety rated optocoupler  
- No pre-load required  
BP/M  
FB  
+
5. Fail-safe – output is not subjected to input  
voltage if the internal power MOSFET fails  
6. Minimum no-load consumption  
S
D
PI-7848-031616  
Table 3 (cont). Common Circuit Configurations using LinkSwitch-TN2.  
Figures 9a, 9b and 9c are printed circuit board layout design  
examples for the circuit schematic shown in Figure 8. The loop  
formed between the LinkSwitch-TN2, inductor (L1), freewheeling  
diode (D1), and output capacitor (C2) should be kept as small as  
possible. The BYPASS pin capacitor C1 should be located physically  
close to the SOURCE (S) and BYPASS (BP) pins. To minimize direct  
coupling from switching nodes, the LinkSwitch-TN2 should be placed  
away from AC input lines. It may be advantageous to place capacitors  
C4 and C5 in-between LinkSwitch-TN2 and the AC input. The second  
rectifier diode D4 is optional, but may be included for better EMI  
performance and higher line surge withstand capability.  
LinkSwitch-TN2 Layout Considerations  
In the buck or buck-boost converter configuration, since the SOURCE  
pins in LinkSwitch-TN2 are switching nodes, the copper area  
connected to SOURCE should be minimized to minimize EMI within  
the thermal constraints of the design.  
In the boost configuration, since the SOURCE pins are tied to DC  
return, the copper area connected to SOURCE can be maximized to  
improve heat sinking.  
Figure 9a. Recommended Printed Circuit Layout for LinkSwitch-TN2 using P Package.  
8
Rev. F 01/17  
www.power.com