LNK302/304-306
Pin Functional Description
DRAIN (D) Pin:
Power MOSFET drain connection. Provides internal operating
current for both start-up and steady-state operation.
for both average and quasi-peak emissions. The frequency
jitter should be measured with the oscilloscope triggered at the
falling edge of the DRAIN waveform. The waveform in Figure 4
illustrates the frequency jitter of the LinkSwitch-TN.
BYPASS (BP) Pin:
Connection point for a 0.± mF external bypass capacitor for the
internally generated 1.8 V supply.
Feedback Input Circuit
The feedback input circuit at the FEEDBACK pin consists of a
low impedance source follower output set at ±.61 V. When the
current delivered into this pin exceeds 49 mA, a low logic level
(disable) is generated at the output of the feedback circuit. This
output is sampled at the beginning of each cycle on the rising
edge of the clock signal. If high, the power MOSFET is turned
on for that cycle (enabled), otherwise the power MOSFET
remains off (disabled). Since the sampling is done only at the
beginning of each cycle, subsequent changes in the FEEDBACK
pin voltage or current during the remainder of the cycle are ignored.
FEEDBACK (FB) Pin:
During normal operation, switching of the power MOSFET is
controlled by this pin. MOSFET switching is terminated when a
current greater than 49 mA is delivered into this pin.
SOURCE (S) Pin:
This pin is the power MOSFET source connection. It is also the
ground reference for the BYPASS and FEEDBACK pins.
5.8 V Regulator and 6.3 V Shunt Voltage Clamp
The 1.8 V regulator charges the bypass capacitor connected to
the BYPASS pin to 1.8 V by drawing a current from the voltage
on the DRAIN, whenever the MOSFET is off. The BYPASS pin
is the internal supply voltage node for the LinkSwitch-TN. When
the MOSFET is on, the LinkSwitch-TN runs off of the energy
stored in the bypass capacitor. Extremely low power consumption
of the internal circuitry allows the LinkSwitch-TN to operate
continuously from the current drawn from the DRAIN pin. A
bypass capacitor value of 0.± mF is sufficient for both high
frequency decoupling and energy storage.
P Package (DIP-8B)
G Package (SMD-8B)
D Package (SO-8C)
8
7
6
5
1
2
S
S
S
S
1
2
8
7
BP
FB
S
S
S
S
BP
FB
3
4
4
D
5
D
3b
3a
In addition, there is a 6.3 V shunt regulator clamping the
BYPASS pin at 6.3 V when current is provided to the BYPASS
pin through an external resistor. This facilitates powering of
LinkSwitch-TN externally through a bias winding to decrease
the no-load consumption to about 10 mW.
PI-5422-060613
Figure 3. Pin Configuration.
BYPASS Pin Undervoltage
LinkSwitch-TN Functional Description
The BYPASS pin undervoltage circuitry disables the power
MOSFET when the BYPASS pin voltage drops below 4.81 V.
Once the BYPASS pin voltage drops below 4.81 V, it must rise
back to 1.8 V to enable (turn-on) the power MOSFET.
LinkSwitch-TN combines a high-voltage power MOSFET switch
with a power supply controller in one device. Unlike conventional
PWM (pulse width modulator) controllers, LinkSwitch-TN uses a
simple ON/OFF control to regulate the output voltage. The
LinkSwitch-TN controller consists of an oscillator, feedback
(sense and logic) circuit, 1.8 V regulator, BYPASS pin
undervoltage circuit, over-temperature protection, frequency
jittering, current limit circuit, leading edge blanking and a 700 V
power MOSFET. The LinkSwitch-TN incorporates additional
circuitry for auto-restart.
Over-Temperature Protection
The thermal shutdown circuitry senses the die temperature.
The threshold is set at ±42 °C typical with a 71 °C hysteresis.
When the die temperature rises above this threshold (±42 °C)
the power MOSFET is disabled and remains disabled until the
die temperature falls by 71 °C, at which point it is re-enabled.
Current Limit
Oscillator
The current limit circuit senses the current in the power MOSFET.
When this current exceeds the internal threshold (ILIMIT), the
power MOSFET is turned off for the remainder of that cycle.
The leading edge blanking circuit inhibits the current limit
comparator for a short time (tLEB) after the power MOSFET is
turned on. This leading edge blanking time has been set so
that current spikes caused by capacitance and rectifier reverse
recovery time will not cause premature termination of the
switching pulse.
The typical oscillator frequency is internally set to an average of
66 kHz. Two signals are generated from the oscillator: the
maximum duty cycle signal (DCMAX) and the clock signal that
indicates the beginning of each cycle.
The LinkSwitch-TN oscillator incorporates circuitry that
introduces a small amount of frequency jitter, typically 4 kHz
peak-to-peak, to minimize EMI emission. The modulation rate
of the frequency jitter is set to ± kHz to optimize EMI reduction
3
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Rev. J 06/13
POWERINT [ Power Integrations ]
