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INN3165C-H102-TL 参数 Datasheet PDF下载

INN3165C-H102-TL图片预览
型号: INN3165C-H102-TL
PDF下载: 下载PDF文件 查看货源
内容描述: [IC OFFLINE SWITCH SR CONTROL]
分类和应用: 开关
文件页数/大小: 30 页 / 2250 K
品牌: POWERINT [ Power Integrations ]
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InnoSwitch3-CE  
SR Disable Protection  
Intelligent Quasi-Resonant Mode Switching  
In each cycle SR is only engaged if a set cycle was requested by the  
secondary controller and the negative edge is detected on the  
FORWARD pin. In the event that the voltage on the ISENSE pin  
exceeds approximately 3 times the CC threshold, the SR FET drive is  
disabled until the surge current has diminished to nominal levels.  
In order to improve conversion efficiency and reduce switching  
losses, the InnoSwitch3-CE features a means to force switching when  
the voltage across the primary switch is near its minimum voltage  
when the converter operates in discontinuous conduction mode (DCM).  
This mode of operation is automatically engaged in DCM and disabled  
once the converter moves to continuous-conduction mode (CCM).  
SR Static Pull-Down  
To ensure that the SR gate is held low when the secondary is not in  
control, the SYNCHRONOUS RECTIFIER DRIVE pin has a nominally  
“ON” device to pull the pin low and reduce any voltage on the SR gate  
due to capacitive coupling from the FORWARD pin.  
Rather than detecting the magnetizing ring valley on the primary-  
side, the peak voltage of the FORWARD pin voltage as it rises above  
the output voltage level is used to gate secondary requests to initiate  
the switch “ON” cycle in the primary controller.  
Open SR Protection  
The secondary controller detects when the controller enters in  
discontinuous-mode and opens secondary cycle request windows  
corresponding to minimum switching voltage across the primary  
power MOSFET.  
In order to protect against an open SYNCHRONOUS RECTIFIER  
DRIVE pin system fault the secondary controller has a protection  
mode to ensure the SYNCHRONOUS RECTIFIER DRIVE pin is  
connected to an external FET. If the external capacitance on the  
SYNCHRONOUS RECTIFIER DRIVE pin is below 100 pF, the device  
will assume the SYNCHRONOUS RECTIFIER DRIVE pin is “open” and  
there is no FET to drive. If the pin capacitance detected is above  
100 pF, the controller will assume an SR FET is connected.  
Quasi-Resonant (QR) mode is enabled for 20 ms after DCM is detected  
or when ring amplitude (pk-pk) >2 V. Afterwards, QR switching is  
disabled, at which point switching may occur at any time a secondary  
request is initiated.  
The secondary controller includes blanking of ~1 ms to prevent false  
detection of primary “ON” cycle when the FORWARD pin rings below  
ground. See Figure 9.  
In the event the SYNCHRONOUS RECTIFIER DRIVE pin is detected to  
be open, the secondary controller will stop requesting pulses from  
the primary to initiate auto-restart.  
If the SYNCHRONOUS RECTIFIER DRIVE pin is tied to ground at  
start-up, the SR drive function is disabled and the open  
SYNCHRONOUS RECTIFIER DRIVE pin protection mode is also  
disabled.  
8
Rev. D 08/18  
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