7-Feb-2006
EP-91 12 V, 1 A, Universal Input Supply
4.3 Output Rectification and Filtering
Diode D7 rectifies the output of T1. Output voltage ripple was minimized by using a low
ESR capacitor for C10 (see Section 6 for component part numbers and values). A post
filter (ferrite bead L2 and C11) attenuates the high frequency switching noise.
4.4 Feedback and Output Voltage Regulation
The supply’s output voltage regulation set point is set by the voltage that develops across
Zener diode VR3, R6 and the LED in opto-coupler U2. The value of R4 was calculated to
bias VR3 to about 0.5 mA when it goes into reverse avalanche conduction. This ensures
that it is operating close to its rated knee current. Resistor R6 limits the maximum current
during load transients. The values of R4 and R6 can both be varied slightly to fine-tune
the output regulation set point. When the output voltage rises above the set point, the
LED in U2 becomes forward biased. On the primary side, the photo-transistor of U2
turns on and draws current out of the EN/UV pin of U1. Just before the start of each
switching cycle, the controller checks the EN/UV pin current. If the current flowing out of
the EN/UV pin is greater than 115 µA, that switching cycle will be disabled. As switching
cycles are enabled and disabled, the output voltage is kept very close to the regulation
set point. For greater output voltage regulation accuracy, a reference IC such as a
TL431 can be used in place of VR3.
4.5 Output Overvoltage Shutdown
The TinySwitch-III family of ICs can detect overvoltage on the output of the supply and
latch off. This protects the load in an open feedback loop fault condition, such as the
failure of the optocoupler. Overvoltage on the output is detected through the BP/M pin
and the bias winding on the transformer. The bias winding voltage is determined by the
reflection of the output voltage through the turns ratio of the transformer. Therefore, an
overvoltage on the output will be reflected onto the bias winding. The overvoltage
threshold is the sum of the breakdown voltage of Zener diode VR2 and the BP/M pin
voltage (28 V + 5.8 V). If the output voltage becomes abnormally high, the voltage on the
bias winding will exceed the threshold voltage and excess current will flow into the BP/M
pin. The latching shutdown circuit is activated when current into the BP/M pin exceeds
5 mA. Resetting a latched shutdown requires removing the AC input from the supply
long enough to allow the input capacitors (C1 and C2) to discharge, and the BP/M pin
voltage to drop below 2 V. Resistors R7 and R3 provide additional filtering of the bias
voltage, with R3 also limiting the maximum current into the BYPASS pin in an OV
condition
4.6 EMI Design Aspects
An input pi filter (C1, L1 and C2) attenuates conducted, differential mode EMI noise.
Shielding techniques (E-Shield™) were used in the construction of T1 to reduce common
mode EMI displacement currents. Resistor R2 and capacitor C4 dampen out some of the
high frequency ringing that occurs when the MOSFET turns off. When combined with the
IC’s frequency jitter function, these techniques produce excellent conducted and radiated
EMI performance (see Section 12 of this report).
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