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EPR-68 参数 Datasheet PDF下载

EPR-68图片预览
型号: EPR-68
PDF下载: 下载PDF文件 查看货源
内容描述: 工程原型报告EP 68 - 6.6 W¯¯ DC-DC反激变换器使用DPA -开关 - ( DPA423G ) [Engineering Prototype Report for EP 68 - 6.6 W DC-DC Flyback Converter Using DPA-Switch- (DPA423G)]
分类和应用: 开关
文件页数/大小: 28 页 / 2226 K
品牌: POWERINT [ Power Integrations ]
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EP68 3.3 V, 2 A DC-DC Power Supply  
19-Jul-2005  
4 Circuit Description  
The Flyback topology was used to minimize circuit board size, parts count and cost, while  
attaining excellent operating efficiency across the input voltage range.  
4.1 DPA-Switch Primary  
The DPA423G IC provides PWM control, startup, feedback, under/over voltage and over-  
temperature protection functions. The integrated 220 V MOSFET provides excellent  
switching characteristics at the selected 400 kHz operating frequency. The MOSFET and  
controller consume minimal power, enabling a typical operating efficiency of 74%-78%  
across the operating input voltage range (see Figure 7).  
R1 provides a 25 kinput impedance, consistent with PoE Class 0 requirements. Above  
30 V, Zener VR1 conducts, allowing n-channel MOSFET Q1 to turn on. Zener diode VR2  
protects the gate of Q1 from overvoltage damage. Resistors R2 and R3 provide  
repeatable on and off timing.  
Resistor R5 programs the typical input under-voltage ON threshold to 33 VDC. Resistors  
R4 and R6 program the internal device current limit to reduce with increasing input  
voltage. Maximum output (overload) current varies less than 5% across the operating  
voltage range. The reduction in overload output current reduces secondary transformer  
leakage spikes and allows the use of a 30 V Schottky diode, for the output rectifier D1.  
The primary-side Zener clamp, VR3, provides protection of the DPA423G drain under  
input surge and overvoltage conditions. Zener diode VR3 does not conduct under normal  
operating conditions.  
The primary bias winding provides CONTROL pin current after start-up. Diode D2  
rectifies the bias winding, while components R8 and C11 reduce the high frequency  
switching noise and reduce the peak charging of the bias voltage.  
The DPA423G operates well within the recommended junction temperature limits  
(100 °C) at an elevated ambient of 50 °C, in a free-convection cooled environment (see  
Section 11).  
4.2 Output Rectification  
Schottky output diode D1 enables low-loss rectification of the secondary winding voltage.  
Low ESR tantalum output capacitors, C7-9, reduce switching ripple and minimize losses.  
Secondary output choke L1 and ceramic output capacitor C10 reduce high frequency  
noise and ripple at the output.  
Power Integrations  
Tel: +1 408 414 9200 Fax: +1 408 414 9201  
www.powerint.com  
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