DI-34
80
70
60
50
40
Key Design Points
• Use KRP (ripple-to-peak current ratio) in the range of 0.4 to
0.6 and VOR (output reflected voltage) of 90 V to
110 V for best efficiency.
• Use low cost optocoupler - gain is non-critical.
• PCBtraceswhichcarryhighswitchingvoltagesandcurrent
should be short and wide to reduce EMI.
• Reduce leakage inductance by filling each winding layer
across the entire width of the bobbin.
• R4 should be large enough to limit dissipation, to meet
<300 mW no-load target, while still limiting peak DRAIN
voltage to a safe value – 200 kΩ is a good start value for
most designs.
QP
AV
Quasi Peak
30
20
10
0
Average
-10
-20
0.15
• A layer of insulation tape between each layer of primary
winding will further reduce inter-winding capacitance and
therefore switching losses.
1.0
10.0
-100.0
Frequency (MHz)
Figure 3. Conducted Emissions–EN55022 Class B (QP and AVG),
5 V, 1 A, 230 VAC, with Artificial Hand Connected to
Secondary Return.
• Ferrite bead L2 reduces radiated EMI.
300
I
= 0 A
O
TRANSFORMER PARAMETERS
250
EE16, Nippon Ceramic NC-2H or
Core
equivalent, AL = 135 nH/T2
200
150
Bobbin
EEL16 Vertical
Shield (1-NC), Primary (4-1), Shield
(3-2), and Secondary (10-8).
Winding Order
(pin numbers)
100
50
Primary Inductance
(Pins 1-4 all others open)
1660 µH ±10%
Primary Resonant
Frequency (Pins 1-4, all
other open)
400 kHz (minimum)
0
50
100
Input Voltage (VAC)
Figure 2. No-load Input Power Consumption.
150
200
250
300
Leakage Inductance
(Pins 1-4, with Pins 8-14
shorted)
70 µH (maximum)
Table 1. Transformer Design Parameters.
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patent applications assigned to Power Integrations. A complete list of Power Integrations’ patents may be found at www.powerint.com.
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PI Expert is a trademark of Power Integrations, Inc. ©Copyright 2003, Power Integrations, Inc.
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