欢迎访问ic37.com |
会员登录 免费注册
发布采购

DI-25 参数 Datasheet PDF下载

DI-25图片预览
型号: DI-25
PDF下载: 下载PDF文件 查看货源
内容描述: 30W的DC -DC转换器采用同步整流 [30 W DC-DC Converter with Synchronous Rectification]
分类和应用: 转换器
文件页数/大小: 2 页 / 484 K
品牌: POWERINT [ POWER INTEGRATIONS, INC. ]
 浏览型号DI-25的Datasheet PDF文件第2页  
Design Idea DI-25
®
DPA-Switch
30 W DC-DC Converter
with Synchronous Rectification
Application
DC-DC Converter
Device
DPA425R
Power Output
30 W
Input Voltage
36-75 VDC
Output Voltage
5V
Topology
Forward
Design Highlights
• Extremely low component count
• High Efficiency – 90% using synchronous rectification
• Accurate UV/OV allows self-driven synchronous
rectification
• No current sense resistor or current transformer required
• Output overload, open loop and thermal protection
• 300 kHz switching frequency – optimizes efficiency when
simple self-driven synchronous rectification is used
DRAIN voltage clamping and core reset is provided by VR1
and the gate capacitance of Q1. The bias supply for U1 is
generated from an auxiliary winding on L2, providing higher
efficiency than a winding on T1.
Capacitor C17 and R15 drive the gate of Q2, C17 providing DC
isolation to prevent Q1 gate overstress during power down.
Diode D4 resets the voltage on C17 before the next switching
cycle. Resistor R17 filters voltage spikes at the gate of Q1 and
D2 prevents the body diode of Q1 from conducting. MOSFETs
Q1 and Q2 are connected as self-driven synchronous rectifiers.
Operation
DPA-Switch
greatly simplifies the deisign compared to a discrete
implementation. Resistor R1 programs the input under/over
voltages to 33 V and 86 V, respectively, and linearly reduces the
maximum duty cycle with input voltage to prevent core saturation
during load transients. Tight tolerances of the UV/OV thresholds
determine the secondary MOSFETs gate voltage range, allowing
low cost, self-driven synchronous rectification. Resistor R3
programs the internal current limit of the DPA425R to 45% of
nominal. The larger
DPA-Switch
selection reduces conduction
losses, raising efficiency without design or overload penalty.
L1
1
µH
2.5 A
C7
1 nF
1.5 kV
R14
10
L2
C17
3300 pF
R16
10 kΩ
D2
Q1
Si4888
DY
C4
4.7
µF
20 V
D1
BAV
19WS
RTN
Key Design Points
• For nominal undervoltage set point V
UV
:
R1 = (V
UV
-2.35 V)/50
µA.
V
OV
= (R1×135
µA)
+ 2.5 V.
• Select time constant of R16 and C17 to be much longer than
the period of one switching cycle.
• Zener VR1 safely limits the DRAIN voltage below BV
DSS
and guarantees transformer reset.
• Opto U2 should have a CTR range of 100% to 200% for
optimum loop stability.
+
V
IN
36-75 VDC
C10
100
µF
10 V
C11
100
µF
10 V
C12
1
µF
10 V
5 V, 6 A
R1
619 kΩ
1%
R15
10
R17
10
T1
Q2
Si4888
DY
D4
BAV19WS
U2
R7
10 kΩ
R10
10.0 kΩ
1%
C16
100 nF
R12
5.1
C1, C2 & C3
1
µF
100 V
DPA-Switch
D
L
CONTROL
U1
DPA425R
C
U2
PC357N1T
D3
BAV19WS
R6
150
C13
10
µF
10 V
U3
LM431AIM3
S
X
F
R9
220
VR1
SMBJ
150
V
IN
R3
18.2 kΩ
1%
R4
1.0
C5
220 nF
C6
68
µF
10 V
C14
1
µF
R11
10.0 kΩ
1%
PI 3472 040903
Figure 1. DPA-Switch 30 W, 5 V, 6 A DC-DC Converter.
DI-25
www.powerint.com
December 2004