DI-89
DI-138
protectsQ2fromshortcircuitconditionsbylimitingthecollector
current, while R5 maintains regulation even if the -5Voutput is
unloaded. Locating transistors Q1 and Q2 physically close to
one another provides tracking of VBE drops, minimizing output
voltage variation with temperature.
and EMI requirements. For single 100/115 VAC
applications, the voltage of C1 and C2 can be reduced
to 200 V.
• For correct operation of Q1, select the value of R5 to
give 1 mA at no-load.
• Limit the maximum value of R4 such that a minimum
This arrangement works well in this application, where the
load range is limited and the impact on efficiency of linear
regulation is minimized.
VCE voltage of 1 V appears on Q2. This ensures that
Q2 remains in linear operation when the 5 V output is
at full load.
80
70
60
50
40
30
20
10
0
Key Design Points
QP
AV
• Diode D2 must be an ultra-fast type. The MURS160
selected has a tRR of 25 ns; a slower ultra-fast diode
(≤50 ns) may be used, but efficiency may be reduced.
• A Zener with a low test current should be selected for
VR1. The initial tolerance directly affects the output
tolerance, a 2% part gives an overall variation including
line and load regulation of ±5%.
• The temperature coefficient of VR1 is –0.8 mV/°C, giving
a further ±0.4% variation over a temperature of 0 to 50 °C.
• R1 and R2 should be 1% parts for better accuracy of 12 V
output.
-10
• Pre-loads R5 and R6 are only necessary if regulation at
no-load is required.
-20
0.15
1.0
10.0
100.0
MHz
• For single 230 VAC applications, the value of C1 and C2
can be reduced to 2.2 μF, depending on differential surge
Figure 3. Conducted EMI Scan to EN55022B Limits Measured at
230 VAC Input.
4
3
2
1
0
-1
-2
-3
-4
7 V output at 265 VAC (5 V at min load)
-5 V output at 265 VAC (12 V at no load)
7 V output at 185 VAC (5 V at full load)
-5 V output at 185 VAC (12 V at full load)
0
20
40
60
80
100
% Full Load
Figure 2. Worst Case Load and Line Regulation Results.
For the latest updates, visit www.powerint.com
Power Integrations reserves the right to make changes to its products at any time to improve reliability or
manufacturability. Power Integrations does not assume any liability arising from the use of any device or circuit
described herein. POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL
WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS. The products and applications
illustrated herein (transformer construction and circuits external to the products) may be covered by one or more U.S.
and foreign patents or potentially by pending U.S. and foreign patent applications assigned to Power Integrations.
A complete list of Power Integrations' patents may be found at www.powerint.com. Power Integrations grants its
customers a license under certain patent rights as set forth at http://www.powerint.com/ip.htm.
Power Integrations
5245 Hellyer Avenue
San Jose, CA 95138
Phone: 1-408-414-9200
Apps: 1-408-414-9660
Apps Fax: 1-408-414-9760
The PI logo, TOPSwitch, TinySwitch, LinkSwitch, DPA-Switch, PeakSwitch, EcoSmart, Clampless, E-Shield, Filterfuse,
StackFET, PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their
respective companies. ©2007, Power Integrations, Inc.
For a complete listing of worldwide
sales offices, please visit
www.powerint.com
Rev. A 04/07