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OX16PCI952-TQC60-A 参数 Datasheet PDF下载

OX16PCI952-TQC60-A图片预览
型号: OX16PCI952-TQC60-A
PDF下载: 下载PDF文件 查看货源
内容描述: 集成高性能的双UART ,并行端口和5.0V PCI接口 [Integrated High Performance Dual UARTs, Parallel Port and 5.0v PCI interface]
分类和应用: PC
文件页数/大小: 77 页 / 529 K
品牌: OXFORD [ OXFORD SEMICONDUCTOR ]
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OX16PCI952  
OXFORD SEMICONDUCTOR LTD.  
Pins  
Multi-purpose & External interrupt pins  
Dir1  
Name  
Description  
59  
I/O  
MIO 0  
Multi-purpose I/O 0. Can be driven high or low, or be used to  
assert PCI interrupts or power management events (PME).  
60  
I/O  
MIO 1  
Multi-purpose I/O 1. Can be driven high or low, or be used to  
assert PCI interrupts or power management events (PME).  
Microwire EEPROM pins  
65  
64  
62  
O
O
IU  
EE_CK  
EE_CS  
EE_DI  
EEPROM clock signal  
EEPROM active-high Chip Select Signal  
EEPROM data in  
(To be connected to the external EEPROM’s DO pin).  
When the optional serial EEPROM is connected, this pin  
should be pulled up using an external 1-10k resistor. When  
the external EEPROM is not required, this external pull-up is  
not necessary as the internal pull-up is sufficient.  
EEPROM data out.  
63  
O
EE_DO  
(To be connected to the external EEPROM’s DI pin)  
Miscellaneous pins  
55  
ID  
I
TEST  
TESTPIN.  
This must be connected to GND.  
MODE selector.  
56  
MODE 0  
MODE0 = 0. Device operates as a dual function device,  
where function 0 is the Dual UARTs and Function 1 is the  
parallel port.  
MODE0 = 1. Device operates only as a single function  
device, where function 0 is the Dual UARTs. Function 1  
does not exist, so the parallel port is not visible2 to PCI  
accesses.  
Power and ground3  
1, 10, 21, 30, 38, 46, 58, 77, 89,  
103, 118  
9, 11, 19, 20, 22, 29, 37, 45, 53,  
54, 57, 61, 67, 76, 82, 92, 93, 102,  
112, 116, 119, 128  
V
VDD  
GND  
Device Power  
Device Gnd.  
G
Table 2: Pin Descriptions  
DS-0028 Jul 05  
External-Free Release  
Page 12