4.I/ O Terminal
4.1.Pin Assignment
CN1
No.
Symbol
A0
Level
H / L
H / L
Function
H : D0~D7 are display data. L : D0~D7 are a command.
80 family MPU : WR Signal Input L : Active
68 family MPU : Enable Clock Input
1
2
WR
(E)
3
CS
D7
H / L
Chip select signal. L : Active
4
H / L
Data Bus Line
5
D6
H / L
Data Bus Line
6
D5
H / L
Data Bus Line
7
D4
H / L
Data Bus Line
8
D3
H / L
Data Bus Line / Non- connection at 4- bit operation
Data Bus Line / Non- connection at 4- bit operation
Data Bus Line / Non- connection at 4- bit operation
Data Bus Line / Non- connection at 4- bit operation
Supply Voltage + 3V
9
D2
H / L
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
D1
H / L
D0
H / L
VDD
VSS
V5
-
-
Supply Voltage 0V (GND)
-
Connect to VDD and a capacitor of 0.1~4.7mF(Cf.chap.4.2)
Connect to a capacitor of 0.1~4.7mF (Cf.chap.4.2)
Connect to a capacitor of 0.1~4.7mF (Cf.chap.4.2)
Connect to a capacitor of 0.1~4.7mF (Cf.chap.4.2)
Connect to a capacitor of 0.1~4.7mF (Cf.chap.4.2)
Supply Voltage (LCD Drive)
V4
-
V3
-
V2
-
V1
-
VOUT
VSS
VDD
P/ S
IF
-
-
Supply Voltage 0V ( GND)
-
Supply Voltage + 3V
H / L
H / L
H / L
H : Parallel Data Transfer, L : Serial Data Transfer
Interface Data Length Select.H : 8- bit Parallel,L : 4- bit Parallel
In case of a 68 series MPU,initialization can be performed by
RES
changing RES
. In case of an 80 series MPU,initialization
can be performed by changung
.
A reset operation is performed by edge sensing of the RES
signal.
An interfase type for the 68/ 80 seriees MPU is selected by
Input level after initialization.
²L² : 68 series MPU interface.
²H² : 80 series MPU interface.
DMC- 50747NF- AK (AK) No. 2001- 0124
OPTREX CORPORATION
Page 9/ 17
OPTREX [ OPTREX CORPORATION ]
