MC14051B, MC14052B, MC14053B
V
DD
V
DD
V
DD
IN/OUT
OUT/IN
V
EE
V
DD
LEVEL
CONVERTED
CONTROL
IN/OUT
OUT/IN
CONTROL
V
EE
Figure 1. Switch Circuit Schematic
16
V
V
TRUTH TABLE
DD
Control Inputs
Select
INHꢀꢀ6
BINARY TO 1−OF−8
DECODER WITH
INHIBIT
ON Switches
Aꢀ11
Bꢀ10
Cꢀꢀ9
LEVEL
CONVERTER
C*
B
A
MC14051B MC14052B
MC14053B
Inhibit
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
1
X0
X1
X2
X3
Y0
Y1
Y2
Y3
X0
X1
X2
X3
Z0 Y0 X0
Z0 Y0 X1
Z0 Y1 X0
Z0 Y1 X1
8
V
SS
7
EE
X0ꢀ13
X1ꢀ14
X2ꢀ15
X3ꢀ12
X4ꢀꢀ1
X5ꢀꢀ5
X6ꢀꢀ2
X7ꢀꢀ4
0
0
0
0
1
1
1
1
0
0
1
1
0
1
0
1
X4
X5
X6
X7
Z1 Y0 X0
Z1 Y0 X1
Z1 Y1 X0
Z1 Y1 X1
3ꢀX
1
x
x
x
None
None
None
*Not applicable for MC14052
x = Don’t Care
Figure 2. MC14051B Functional Diagram
16
V
DD
16
V
DD
INHꢀꢀ6
Aꢀ10
BINARY TO 1−OF−4
DECODER WITH
INHIBIT
LEVEL
CONVERTER
INHꢀꢀ6
Aꢀ11
Bꢀ10
BINARY TO 1−OF−2
DECODER WITH
INHIBIT
LEVEL
CONVERTER
Bꢀꢀ9
Cꢀꢀ9
8
V
SS
7
V
EE
X0ꢀ12
X1ꢀ14
X2ꢀ15
X3ꢀ11
Y0ꢀꢀ1
Y1ꢀꢀ5
Y2ꢀꢀ2
Y3ꢀꢀ4
8
V
SS
7
V
EE
13ꢀX
3ꢀꢀY
X0ꢀ12
X1ꢀ13
Y0ꢀꢀ2
Y1ꢀꢀ1
Z0ꢀꢀ5
Z1ꢀꢀ3
14ꢀX
15ꢀY
4ꢀꢀZ
Figure 3. MC14052B Functional Diagram
Figure 4. MC14053B Functional Diagram
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5