Truth Tables
(Each Flip-flop)
Synchronous Operation
Inputs
Asynchronous Operation
Inputs
Outputs
Outputs
Dn
CPa
CPb
MR
Qn(t+1)
Dn
CPa
CPb
MR
Qn(t+1)
L
H
L
L
L
L
L
L
L
L
L
L
L
H
X
X
X
H
L
L
L
L
H
X
X
X
H
H
Qn(t)
Qn(t)
Qn(t)
H
L
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
t = Time before CP positive transition
t+1 = Time after CP positive transition
= LOW-to-HIGH transition
Logic Diagram
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