FEDL7051LA-02
1
半导体
ML7051LA
引脚布局
1
NC
A
CIO13
B
CIO11
C
核心“
VDD
D
CIO7
E
CIO4
F
GND
G
MA15
H
MA12
J
MA10
K
GND
L
MA6
M
NC
N
MA5
MA3
核心“
VDD
MD15
MD12
MD8
MD3
GND
MWEN
MCSn1
MBSn0
NC
MA7
MA1
GND
MD13
MD11
MD10
MD5
MD4
MD1
MREN
MBSn1
GND
MA9
MA4
MA2
MA0
VDD
GND
ND7
核心“
VDD
MD0
MOEn1
TDO
核心“
VDD
MA13
核心“
VDD
MA8
MD14
GND
MD9
MD6
MD2
MCSn0 MOEn0
TMS
CLK
MA16
MA11
MA14
TEST_L
TEST_L
PLLSEL nTRST信号， PLLEN
TCK
MA17
MA19
MA18
SVCO0
核心“
TEST_O
SVCO1 DPLOUT
VDD
VDD
CIO0
GND
GND
DP
VDD
DM
CIO3
CIO1
CIO2
GND
PUCTL
VDD
A_VDD
CIO5
CIO9
CIO6
A_GND
RXD
SCLK12
XCLK
CIO8
CIO10 PCMOUT PLL_
数据
PLL-
PLLLOCK POW
RSSI
CLK
核心“
VDD
RSSI
GND
VDD
TXC_IN
GND
CIO12 PCMCLK
RXC
GND
PLL_OF TX_POW TEST_L BBWSEL TXCSEL CORE_ RESETN
TEST5
VDD
CIO15
CORE_ PLL_PS
VDD
GND
PLL_CLK RX_POW TEST_L TEST_L TEST_L
TEST0 TEST2 TEST4
GND
TDI
REMAP1
2
CIO14
3
PCMIN
4
PCM
SYNC
5
TXD
6
PLL_LE
7
VDD
8
9
10
11
12
13
NC
TEST_L TEST_L
TEST1 TEST3
VTM SCLKSEL REMAP0
顶视图
3/24
OKI [ OKI ELECTRONIC COMPONETS ]
