FEDR27V1652F-02-02
OKI Semiconductor
MR27V1652F / P2ROM
BLOCK DIAGRAM
A–1
× 8/× 16 Switch
CE#
CE
OE#
OE
BYTE#
A0
A1
A2
Memory Cell Matrix
A3
A4
A5
1,048,576 × 16-Bit or 2,097,152 × 8-Bit
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
Multiplexer
Output Buffer
D0
D2
D4
D6
D8 D10 D12 D14
D7 D9 D11 D13 D15
D1
D3
D5
In 8-bit output mode, these pins
are placed in a high-Z state and
pin D15 functions as the A-1
address pin.
FUNCTION TABLE
Mode
Read (16-Bit)
Read (8-Bit)
CE#
L
OE#
BYTE#
VCC
D0 to D7
DOUT
D8 to D14
DOUT
D15/A–1
L
L
H
L
L
Hi–Z
L/H
∗
H
L
Output disable
Standby
L
H
3.3 V
Hi–Z
Hi–Z
H
L
H
∗
∗
∗: Don’t Care (H or L)
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