FEDR27T12800J-02-07
OKI Semiconductor
MR27T12800J / P2ROM
BLOCK DIAGRAM
A–1
× 8/× 16 Switch
CE#
CE
OE#
OE
BYTE#
A0
A1
A2
Memory Cell Matrix
A3
A4
A5
A6
8M × 16-Bit or 16M × 8-Bit
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
Multiplexer
Output Buffer
D0
D2
D4
D6
D8 D10 D12 D14
D1
D3
D5
D7
D9 D11 D13 D15
In 8-bit output mode, these pins
are placed in a high-Z state and
pin D15 functions as the A-1
address pin.
PIN DESCRIPTIONS
Pin name
D15 / A–1
A0 to A22
D0 to D14
CE#
Functions
Data output / Address input
Address inputs
Data outputs
Chip enable input
Output enable input
Word / Byte select input
Power supply voltage
Ground
OE#
BYTE#
VCC
VSS
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