FEDL9213-01
1
Semiconductor
ML9213
PIN DESCRIPTIONS
Symbol
V
DISP
V
DD
D-GND
L-GND
SEG1 to 37
Pin
ML9213GA ML9213GP
65, 80
25
24, 40
33
42 to 64,
66 to 79
63, 78
23
22, 38
31
40 to 62,
64 to 77
Type
—
—
—
—
O
Description
Power supply pins for VFD driver circuit.
These should be connected externally.
Power supply pin for logic drive.
D-GND is ground pin for the VFD driver circuit. L-GND is ground
pin for the logic circuit. These should be connected externally.
Segment (anode) signal output pins for a VFD tube. These pins
can be directly connected to the VFD tube. External circuit is not
required.
I
OH
d
–5 mA
Segment (anode) signal output pins for a VFD tube. These pins
can be directly connected to the VFD tube. External circuit is not
required.
I
OH
d
–10 mA
Inverted Grid signal output pins. Since these pins are connected
to the pre-driver, an external circuit is required.
I
OL
d
10 mA
Chip select input pin.
Data is not transferred when CS is set to a Low level.
Shift clock input pin.
Serial data shifts at the rising edge of the CLOCK.
Serial data input pin (positive logic). Data is input to the shift
register at the rising edge of the CLOCK signal.
Duplex/Triplex operation select input pin.
Duplex (1/2 duty) operation is selected when this pin is set to V
DD
.
Triplex (1/3 duty) operation is selected when this pin is set to L-
GND.
Master/Slave mode select input pin.
Master mode is selected when this pin is set to V
DD
.
Slave mode is selected when this pin is set to L-GND.
Dimming pulse input.
When the slave mode is selected, connect this pin to the master
side DIM OUT pin. The pulse width of all the segment outputs is
controlled by an input pulse width of DIM IN. When the master
mode is selected, input to this pin is ignored; therefore, connect
this pin to V
DD
or L-GND. The pulse width of all the segment
outputs is controlled by the built-in digital dimming circuit, and the
pulse width of all the grid outputs is controlled by the internal
timing generator.
Synchronous signal input.
When the slave mode is selected, connect these pins to the
master side SYN COUT1 and 2 pins.
When the master mode is selected, input to these pins is ignored;
therefore, connect these pins to V
DD
or L-GND.
Dimming pulse output.
Connect this pin to the slave side DIM IN pin.
SEG38 to 56
GRID1
GRID2
GRID3
CS
CLOCK
DATA IN
1 to 19
20
21
22
29
30
31
79, 80,
1 to 17
18
19
20
27
28
29
O
O
I
I
I
DUP/TRI
35
33
I
M/S
36
34
I
DIM IN
26
24
I
SYNC IN1
27
25
I
SYNC IN2
DIM OUT
28
39
26
37
O
5/19
OKI [ OKI ELECTRONIC COMPONETS ]
