FEDL9092-01
OKI Semiconductor
ML9092-01/02/03/04
BLOCK DIAGRAM
ML9092-01
COM1 COM10 PB0 PB2 SEG1
SEG56
VIN
10 Output
3 Port
56 Output
Segment Drivers
VS1–
VC1+
VOUT
Voltage
Doubler
Common
Drivers
Drivers
Shift
Register
Data Latch
LCD Bias
Voltage
Driving
Circuit
V0
V2
Display Data RAM
56 10 Bit
×
I/O
Buffer
X Address Decoder
CS
CP
X Address Counter
X Address Register
DI/O
Timing
Generator
OSC1
Oscillation
Circuit
OSC2
5
5 Key Scan/10 Port Drivers
×
1 Port Driver
and Encoder Switch Interface
RESET
TEST
VDD
VSS
KPS
PA0
KREQ
B
A
C3/ C4/
C0/ C1/ C2/
R0/ R1/ R2/
R3/ R4/
C3 C4
D0 D1 D2 D3 D4 C0 C1 C2
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