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ML9060 参数 Datasheet PDF下载

ML9060图片预览
型号: ML9060
PDF下载: 下载PDF文件 查看货源
内容描述: 1/2占空比, 160输出静LCD驱动器 [1/2 DUTY, 160-OUTPUT STATIC LCD DRIVER]
分类和应用: 驱动器输出元件
文件页数/大小: 18 页 / 157 K
品牌: OKI [ OKI ELECTRONIC COMPONETS ]
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¡ Semiconductor  
ML9060  
Switching Characteristics  
(VDD = 2.7 to 5.5V, VLCD = 4.5 to 16V, Ta = –40 to +85°C)  
Parameter  
OSC IN Clock frequency  
(external input)  
Symbol  
Condition  
Min. Typ. Max. Unit Applicable pin  
The clock is input to the  
OSC1 pin. The pins OSC2  
and OSCR are left open.  
OSC I/E = "L"  
fCP1  
50  
25.6 kHz OSC1  
µs OSC1  
Clock pulse width  
(external input)  
tWCP1  
An Rf of 120k W ±2% is  
connected between OSC1  
and OSC2. OSCR is left  
open. OSC I/E = 'H"  
External Rf clock  
frequency  
fOSC1  
7.7 12.8 20.5 kHz OSC1, OSC2  
(internal oscillations)  
OSC1 open. OSC2 and  
OSCR shorted. OSC I/E  
tied to VDD or any "H" level.  
Internal Rf clock frequency  
(with the built-in oscillator)  
OSC1, OSCR,  
7.7 12.8 20.5 kHz  
OSC2  
fOSC2  
Data clock frequency  
Data clock pulse width  
fCP2  
1
MHz CLOCK IN  
ns CLOCK IN  
tWCP2  
100  
Data setup time  
tSU  
tHD  
tCL  
50  
50  
ns DATA IN  
ns CLOCK IN  
ns CLOCK IN  
Data hold time  
CLOCK to LOAD  
Period  
100  
LOAD to CLOCK  
Period  
tLC  
100  
100  
50  
ns LOAD IN  
ns LOAD IN  
LOAD Pulse width  
CLOCK IN to  
tWLD  
tPLH  
tPHL  
CLOCK IN  
ns  
CL=15pF  
DATA OUT delay time  
DATA OUT  
CLOCK IN/OUT  
LOAD IN/OUT  
SEG-TEST IN/OUT  
BLANK IN/OUT  
COM OUT  
IN to OUT delay time  
tDIO No load  
20  
40  
ns  
ns  
COM OUT to SYNC  
delay time  
tDCS CL=15pF  
SYNC  
Input signal rise time  
Input signal fall time  
tR  
tF  
50  
50  
ns All inputs other than  
the OSCR input  
ns  
* : The specifications of the internal Rf clock frequency and the external Rf clock frequency will  
be determined finally at the end of sample evaluations.  
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