¡ Semiconductor
ML9052
BLOCK DIAGRAM
SEG131
COM95
V
DD
V1
V2
V3
V4
V5
V
SS
VC1+
VS1–
VC2+
VS2–
Display Data Latch Circuit
COM Output State
Selection Cricuit
SEG Drivers
COM
Drivers
Display Timing Generator Circuit
COMS
COMS
COM0
SEG0
FRS
FR
CL
DOF
M/S
Power Supply Circuit
Page Address Circuit
VC3+
VC4+
VC5+
VC6+
V
OUT
V
IN
VR
Display Data RAM
132¥97
Oscillator Circuit
VRS
IRS
HPM
Column Address Circuit
Line address circuit
I/O Buffer
CLS
Bus Holder
Command Decoder
Status
MPU lnterface
WR(R/W)
D6(SCL)
D7(SI)
RD(E)
RES
CS1
CS2
C86
P/S
D5
D4
D3
D2
D1
D0
A0
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