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ML9050 参数 Datasheet PDF下载

ML9050图片预览
型号: ML9050
PDF下载: 下载PDF文件 查看货源
内容描述: 与内置RAM的LCD点阵显示132通道LCD驱动器 [132-Channel LCD Driver with Built-in RAM for LCD Dot Matrix Displays]
分类和应用: 驱动器接口集成电路
文件页数/大小: 71 页 / 466 K
品牌: OKI [ OKI ELECTRONIC COMPONETS ]
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PEDL9050-02
¡ Semiconductor
ML9050/9051
Function
Pin name
P/S
Number
of pins
I/O
I
Description
This is the pin for selecting parallel data input or serial data input.
P/S = "H": Parallel data input.
P/S = "L": Serial data input.
The pins of the LSI have the following functions depending on the state of
P/S input.
P/S
"H"
"L"
Data/command
A0
A0
Data
D0 to D7
SI (D7)
Read/Write
RD, WR
Write only
Serial clock
SCL (D6)
MPU
Interface
1
When P/S is "L", D0 to D5 will go into the Hi-Z state. In this condition,
the data on the lines D0 to D5 can be "H", "L", or open. The pins
RD
(E)
and
WR
(R/W) should be tied to either the "H" level or the "L" level.
During serial data input, it is not possible to read the display data in the
RAM.
Oscillator
circuit
CLS
1
I
This is the pin for selecting whether to enable or disable the internal
oscillator circuit for the display clock.
CLS = "H": The internal oscillator circuit is enabled.
CLS = "L": The internal oscillator circuit is disabled (External input).
When CLS = "L", the display clock is input at the pin CL.
Display
timing
generator
circuit
M/S
1
I
This is the pin for selecting whether master operation or slave operation
is made towards the ML9050/9051. During master operation, the
synchronization with the LCD display system is achieved by inputting the
timing signals necessary for LCD display.
M/S = "H": Master operation
M/S = "L": Slave operation
The functions of the different circuits and pins will be as follows
depending on the states of M/S and CLS signals.
M/S CLS
"H"
"L"
"H"
"L"
"H"
"L"
Oscillator
circuit
Enabled
Disabled
Disabled
Disabled
Power
supply circuit
Enabled
Enabled
Disabled
Disabled
CL
FR
FRS
DOF
Output Output Output Output
Input Output Output Output
Input
Input
Input Output Input
Input Output Input
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