PEDL9041A-02
OKI Semiconductor
ML9041A-xxA/xxB
Symbol
T
1
, T
2
, T
3
V
DD
GND
S/P
Description
The input pins for test circuits (normally open). Each of these pins is equipped with a
pull-down resistor, so this pin should be left open.
The power supply pin.
The ground level input pin.
The input pin to select the serial or parallel interface.
“L” selects the parallel interface.
“H” selects the serial interface.
The pin to enable this IC in the serial l/F mode.
“L” enables this IC.
“H” disables this IC.
This pin should be open in the parallel l/F mode.
The pin to input shift clock in the serial l/F mode.
Data inputting to the SI pin is carried out synchronizing with the rising edge of this
clock signal.
Data outputting from the SO pin is carried out synchronizing with the falling edge of
this clock signal.
This pin should be open in the parallel l/F mode.
The pin to input DATA in the serial l/F mode.
Data inputting to this pin is carried out synchronizing with the rising edge of the
SHT
signal.
This pin should be open in the parallel l/F mode.
The pin to output DATA in the serial l/F mode.
Data inputting to this pin is carried out synchronizing with the falling edge of the
SHT
signal.
This pin should be open in the parallel l/F mode.
NC pin.
Leave this pin open.
CS
SHT
Sl
SO
DUMMY
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