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ML9042-11DVWA 参数 Datasheet PDF下载

ML9042-11DVWA图片预览
型号: ML9042-11DVWA
PDF下载: 下载PDF文件 查看货源
内容描述: [Dot Matrix LCD Driver, 17 X 100 Dots, CMOS, DIE-233]
分类和应用: 时钟驱动外围集成电路
文件页数/大小: 58 页 / 558 K
品牌: OKI [ OKI ELECTRONIC COMPONETS ]
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FEDL9042-01
OKI Semiconductor
ML9042-xx
PIN DESCRIPTIONS
Symbol
Description
The input pin with a pull-up resistor to select Read (“H”) or Write (“L”) in the Parallel I/F
Mode.
The pin to input data in the Serial l/F Mode. Each instruction code and each data are
read in by the rising edge of the E/SHTB signal.
The input pins with a pull-up resistor to select a register in the Parallel l/F Mode.
RS
1
H
RS
0
/CSB
H
L
L
Name of register
Data register
Instruction register
Expansion Instruction register
RW/SI
RS
0
/CSB, RS
1
H
L
The RSo/CSB pin is configured as a chip enable input in the Serial I/F Mode. Setting
the RSo/CSB pin to “L” allows the I/F to be provided.
The input pin for data input/output between the CPU and the ML9042 and for
activating instructions in the Parallel l/F Mode.
E/SHTB
This pin is configured as a shift clock input in the Serial I/F Mode. The data input to the
PW/SI pin is synchronized to the rising edge of the clock, and the data output from the
DB0(SO) pin is synchronized to the falling edge of the shift clock.
The input/output pins to transfer data of lower-order 4 bits between the CPU and the
ML9042 in the Parallel l/F Mode. The pins are not used for the 4-bit interface.
DB
0
(SO) to DB
3
Only the DB0(SO) pin is configured as a data output in the Serial I/F Mode. Busy flag
& address and data are output synchronized to the falling edge of the E/SHTB signal.
These pins remain pulled up when data is not output.
Each pin is equipped with a pull-up resistor, so this pin should be open when not used.
The input/output pins to transfer data of upper 4 bits between the CPU and the
ML9042 in the Parallel l/F Mode. The pins are not used for the serial interface.
Each pin is equipped with a pull-up resistor, so this pin should be open in the Serial I/F
Mode when not used.
The clock oscillation pins required for LCD drive signals and the operation of the
ML9042 by instructions sent from the CPU.
To input external clock, the OSC
1
pin should be used. The OSC
R3
, OSC
R5,
and OSC
2
pins should be open.
OSC
1
OSC
2
OSC
R3
OSC
R5
To start oscillation with an external resistor, the resistor should be connected between
the OSC
1
and OSC
2
pins. The OSC
R3
and OSC
R5
pins should be open.
To start oscillation at 5 V using an internal resistor, the OSC
2
and OSC
R5
pins should
be short-circuited outside the ML9042. The OSC
1
and OSC
R3
pins should be open.
To start oscillation at 3 V using an internal resistor, the OSC
2
and OSC
R3
pins should
be short-circuited outside the ML9042. The OSC
1
and OSC
R5
pins should be open.
(The OSC
2
, OSC
R3,
and OSC
R5
pins can also be short-circuited outside the ML9042,
and the OSC
1
pin can be open.)
The LCD common signal output pins.
COM
1
to COM
17
For 1/8 duty, non-selectable voltage waveforms are output via COM
9
to COM
17
. For
1/9 duty, non-selectable voltage waveforms are output via COM
10
to COM
17
. For 1/16
duty, a non-selectable voltage waveform is output via COM
17.
The LCD segment signal output pins.
DB
4
to DB
7
SEG
1
to SEG
100
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