FEDL7074-003DIGEST-01
OKI Semiconductor
ML7074-004GA
Pin
No.
33
34
35
36
37
38
39
40
41
42
Symbol
DV
DD
1
A0
A1
A2
A3
A4
A5
A6
A7
PDNB
I/O PDNB = “0”
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
“0”
Description
Digital power supply
Address input
Address input
Address input
Address input
Address input
Address input
Address input
Address input
Power down input
“0”: Power down reset
“1”: Normal operation
SYNC and BCLK I/O control input
“0”: SYNC and BCLK become inputs
“1”: SYNC and BCLK become outputs
Digital ground (0.0 V)
General-purpose input pin 0 (5 V tolerant input)
/Secondary function: Dial pulse detect input pin
General-purpose input pin 1 (5 V tolerant input)
General-purpose output pin 0 (5 V tolerant output, can be pulled up
externally)
/Secondary function: Dial pulse transmit pin
General-purpose output pin 1 (5 V tolerant output, can be pulled up
externally)
Analog power supply
AMP0 non-inverted input
AMP0 inverted input
AMP0 output (10 kΩ driving)
AMP1 output (10 kΩ driving)
AMP1 inverted input
Analog signal ground (1.4 V)
AMP2 Output (10 kΩ driving)
AMP3 Output (10 kΩ driving)
Analog ground (0.0 V)
Digital ground (0.0 V)
4.096 MHz crystal oscillator I/F, 4.096 MHz clock input
4.096 MHz crystal oscillator I/F
Digital power supply
Test control input 3: Normally input “0”.
Test control input 2: Normally input “0”.
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
CLKSEL
DGND1
GPI0
GPI1
GPO0
GPO1
AV
DD
AIN0P
AIN0N
GSX0
GSX1
AIN1N
AVREF
VFRO0
VFRO1
AGND
DGND2
XI
XO
DV
DD
2
TST3
TST2
I
I
I
O
O
I
I
O
O
I
O
O
O
I
O
I
I
I
I
I
“L”
“L”
I
I
“Hi-z”
“Hi-z”
I
“L”
“Hi-z”
“Hi-z”
I
“H”
“0”
“0”
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