FEDL7055-02
OKI Semiconductor
ML7055
PIN DESCRIPTIONS
RF I/F
Pin Name
Direc-
tion
[*0]
O
Internal
Pull Up/
Down,
Schmitt
—
Initial
Value
L
L
L
—
—
—
X
H
L
L
L
L
L
PLL_LE
O
—
H
L
Pull
down
—
—
—
L
RSSI_CLK
O
—
L
X
H
PLL_POW
O
—
L
H
H
TX_POW
O
—
L
L
H
RX_POW
O
—
L
L
L
PLL_PS
O
—
X
L
A7
A3
B3
C6
A2
B2
A8
B2
A2
B7
A1
A1
B8
C1
C2
D5
B3
A3
Pin Placement
ML7055
HB
B6
ML7055
LA
B4
ML7055
LP
A4
Description
ML7050: Transmit data output
CX72303: Transmit data output
BCM2002X: Transmit data output
ML7050: Receive data input
CX72303: Receive data input
BCM2002X: Receive data input
ML7050: Serial write data
CX72303: Serial write data
BCM2002X: Transmit enable
ML7050: Serial clock
CX72303: Serial clock
BCM2002X: Serial clock
ML7050: Serial road enable
0: Negate, 1: Assert
CX72303: Serial enable
0: Assert, 1: Negate
BCM2002X: RF-LSI synthesizer on
0: Negate, 1: Assert
ML7050: Receive field strength data
input
CX72303: Serial read data
BCM2002X: Serial read data
ML7050: Receive field strength data
clock
CX72303: RF-LSI receiving
characteristic control
BCM2002X: System clock request
ML7050: Local PLL power control
0: Assert, 1: Negate
CX72303: PA Power control
0: Negate, 1: Assert
BCM2002X: Select serial transmit
mode
ML7050: Transmit enable
0: Assert, 1: Negate
CX72303: Transmit enable
0: Negate, 1: Assert
BCM2002X: Serial write data
ML7050: Receive enable
0: Assert, 1: Negate
CX72303: Receive enable
0: Negate, 1: Assert
BCM2002X: Receive enable
ML7050: ”L”
CX72303: Power on reset
0: Assert (reset)
1: Negate
BCM2002X: RF-LSI receiving
characteristic control
TXD
RXD
I
—
C5
B5
A5
PLL_DATA
O
—
C7
C2
C1
PLL_CLK
O
—
E6
D1
D2
RSSI
I
B5
A5
C5
[*0]
“I” = Input, “O” = Output, “I/O” = Input/Output
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