FEDL7055-02
OKI Semiconductor
ML7055
CLK and Configuration
Pin Name
SCLKP
SCLKN
XC32KP
XC32KN
SCLKSEL
Direc-
tion
I
O
I
O
I
Internal
Pull Up/
Down,
Schmitt
—
—
—
—
Pull
down
Pull
down
Initial
Value
—
—
—
—
—
Pin Placement
ML7055
HB
E1
D1
A2
A3
B3
ML7055
LA
E9
E10
A9
A8
A7
ML7055
LP
F8
F10
A9
B8
B7
Description
System clock (12/13 MHz) pins
(Power level: CMOS level)
Subclock pins (for oscillator)
System clock frequency select pin
L: Select CLK divided by
internal PLL
H: Select subclock
System clock frequency select pin
L: 13 MHz
H: 12 MHz
RF-LSI select pins
RFSEL[2:0]
001:
ML7050 (OKI)
010:
CX72303 (SKYWORKS)
101:
BCM2002X
(BROADCOM)
Others: Unused
Hardware reset pin (Reset = L)
Sleep pin (Sleep = L)
I
2
C serial clock
I
2
C serial data
System clock (12/13 MHz) output
pins
SFRQSEL
I
—
C4
B7
A7
RFSEL0–
2
I
—
—
[*1]
[*2]
[*3]
RESET
DETACH
SCL
SDA
CLKOUT
I
I
O
I/O
O
Schmitt
Schmitt
—
—
—
—
—
L
H
—
C3
F2
G4
F4
G3
F10
G9
K7
J7
J8
G10
G8
H7
K7
K8
[*1]
[*2]
[*3]
RFSEL0: E3; RFSEL1: E4; RFSEL2: H1
RFSEL0: H9; RFSEL1: H10; RFSEL2: K10
RFSEL0: H10; RFSEL1: H8; RFSEL2: K10
8/30
OKI [ OKI ELECTRONIC COMPONETS ]
