FEDL7033-02
1
Semiconductor
ML7033
Control Register Assignment
Register
Address
A4 A3 A2 A1 A0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
B7
Filter2
SEL
B6
Filter1
SEL
B5
MCK
SEL
B4
Data
B3
LIN
B2
ALAW
CID
FMT
PMG2
LV0
TSA5
DET2
TIM1
LV1R1
F0_1
PMG2
TOUT2
TSA4
DET2
TIM0
LV1R0
SWC1
PMG1
FRQ
TSA3
DET1
TIM3
LV1X3
BSEL1
PMG1
LV1
TSA2
DET1
TIM2
LV1X2
E0_1
B1
B0
R/W
CR0
CR1
CR2
CR3
CR4
CR5
CR6
CR7
CR8
CR9
CR10
CR11
CR12
CR13
CR14
CR15
CR16
CR17
CR18
CR19
SHORT
MODE1 MODE0 R/W
CID
CID
R/W
CH2ON CH1ON
PMG1
LV0
TSA1
DET1
TIM1
LV1X1
DET1*
PMG1
R/W
TOUT1
TSA0
DET1
TIM0
LV1X0
ALM1*
W
R/W
R/W
R/W
CH2TG CH1TG
ON
ON
PMG2
FRQ
TSAE
DET2
TIM3
LV1R3
F2_1
PMG2
LV1
TSAC
DET2
TIM2
LV1R2
F1_1
AOUT1 CH1TG2 CH1TG2 CH1TG2 CH1TG2 CH1TG2 CH1TG2 CH1TG2
R/W
LV3
LV2
LV1
LV0
_8
SEL
TX
TOUT1
CH1TG2 CH1TG2 CH1TG2 CH1TG2 CH1TG2 CH1TG2 CH1TG2 CH1TG2
R/W
_7
_6
_5
_4
_3
_2
_1
_0
CH1TG1 CH1TG1 CH1TG1 CH1TG1 CH1TG1 CH1TG1 CH1TG1 CH1TG1
R/W
LV6
LV5
LV4
LV3
LV2
LV1
LV0
_8
CH1TG1 CH1TG1 CH1TG1 CH1TG1 CH1TG1 CH1TG1 CH1TG1 CH1TG1
R/W
_7
_6
_5
_4
_3
_2
_1
_0
CH2
RING
LV2R3
F2_2
CH2TG1 CH2TG1 CH2TG1 CH1 CH1TG1 CH1TG1 CH1TG1
R/W
TRP2
TRP1
TRP0
RI NG
TRP2
TRP1
TRP0
LV2R2
F1_2
LV2R1
F0_2
LV2R0
SWC2
LV2X3
BSEL2
LV2X2
E0_2
LV2X1
DET2*
LV2X0
ALM2*
R/W
R/W
AOUT2 CH2TG CH2TG CH2TG2 CH2TG2 CH2TG2 CH2TG2 CH2TG2
R/W
SEL
TX
TOUT2
LV3
LV2
LV1
LV0
_8
CH2TG2 CH2TG2 CH2TG2 CH2TG2 CH2TG2 CH2TG2 CH2TG2 CH2TG2
R/W
_7
_6
_5
_4
_3
_2
_1
_0
CH2TG1 CH2TG1 CH2TG1 CH2TG1 CH2TG1 CH2TG1 CH2TG1 CH2TG1
R/W
LV6
LV5
LV4
LV3
LV2
LV1
LV0
_8
CH2TG1 CH2TG1 CH2TG1 CH2TG1 CH2TG1 CH2TG1 CH2TG1 CH2TG1
R/W
_7
_6
_5
_4
_3
_2
_1
_0
CH2
LOOP1
CH2
LOOP0
CH1
LOOP1
CH1
LOOP0
TEST8
TEST3
TEST7
TEST2
TEST6
TEST1
TEST5
TEST0 R/W
TEST4 R/W
TEST11 TEST10 TEST9
*: Read only bit
Note: In this datasheet, numbers in names for control register bits are often substituted by “n” (in a small letter). In
the case, the “n” does not always refer to a channel number.
Ex) MODE0, MODE1
CH1TG2_7, CH1TG2_6
PMG2FRQ, PMG1FRQ
→
MODEn
→
CH1TG2_n
→
PMGnFRQ
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