¡ Semiconductor
ML7000-01/02/03/ML7001-01/02/03
ABSOLUTE MAXIMUM RATINGS
Parameter
Power Supply Voltage
Analog Input Voltage
Digital Input Voltage
Symbol
VDD
Condition
Rating
Unit
—
—
—
–0.3 to +7
V
V
V
VAIN
–0.3 to VDD + 0.3
–0.3 to VDD + 0.3
VDIN
RECOMMENDED OPERATING CONDITIONS
Parameter
Power Supply Voltage
Operating Temperature
Analog Input Voltage
Symbol
VDD
Condition
Min.
Typ.
5.00
3.00
+25
—
Max.
Unit
V
4.75
5.25
3.30
+85
—
—
2.70
Ta
–30
°C
—
2.4
VAIN Connect AIN– and GSX
VPP
—
—
1.2
2.2
—
VDD
High Level Input Voltage
Low Level Input Voltage
VIH
V
V
XSYNC, RSYNC, BCLK,
0.45¥VDD
—
VDD
PCMIN, PDN, ALAW
VIL
0
0
—
0.8
—
0.16¥VDD
64, 96, 128, 192, 200, 256,
384, 512, 768, 1024, 1536,
1544, 2048
Clock Frequency
FC BCLK
kHz
kHz
6.0
6.0
40
—
—
50
50
50
50
50
50
50
50
50
50
0.5
—
–10
8.0
8.0
50
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
9.0
10.0
60
Sync Pulse Frequency
FS XSYNC, RSYNC (–40 to +75 °C)
DC BCLK
Clock Duty Ratio
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
kW
pF
mV
mV
ns
Digital Input Rise Time
Digital Input Fall Time
tlr
tlf
XSYNC, RSYNC, BCLK,
PCMIN, PDN
50
50
tCX BCLKÆXSYNC, See Fig. 1
tXC XSYNCÆBCLK, See Fig. 1
—
Transmit Sync Pulse Setting Time
—
XSYNC Setup Time
XSYNC Hold Time
tXS
tXH
—
—
—
—
tCR BCLKÆRSYNC, See Fig. 1
tRC RSYNCÆBCLK, See Fig. 1
—
Receive Sync Pulse Setting Time
—
RSYNC Setup Time
RSYNC Hold Time
PCMIN Setup Time
PCMIN Hold Time
tRS
tRH
tDS
tDH
—
—
—
—
—
—
—
—
RDL Pull-up resistor
—
Digital Output Load
CDL
Voff
—
—
100
+10
+100
1000
Transmit gain stage, Gain = 0 dB
Transmit gain stage, Gain = +20 dB –100
XSYNC, RSYNC, BCLK
Analog Input Allowable DC Offset
Allowable Jitter Width
—
Values above the dotted line are for ML7000-xx; those below, for ML7001-xx.
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