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ML69Q6203LA 参数 Datasheet PDF下载

ML69Q6203LA图片预览
型号: ML69Q6203LA
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microcontroller, 32-Bit, FLASH, 120MHz, CMOS, PBGA272, 15 X 15 MM, 0.65 PITCH, PLASTIC, LFBGA-272]
分类和应用: 时钟微控制器外围集成电路
文件页数/大小: 18 页 / 317 K
品牌: OKI [ OKI ELECTRONIC COMPONETS ]
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Preliminary
ML696201 and ML69Q6203
Pin Descriptions (Continued)
Symbol
TDI
TDO
RTCK
External Bus Address and Data
XA [23:1]
XD [15:0]
External Bus Controls Signal
XOE_N
XWE_N
XROMCS_N
XRAMCS_N
XBS1_N
XBS0_N
XIOCS11_N
XIOCS10_N
XIOCS01_N
XIOCS00_N
XWAIT [1:0]
XSYSCLK
O
O
O
O
O
O
O
O
O
O
I
O
External memory access read enable, Active-Low
External memory access write enable, Active-Low
External ROM chip select, Active-Low
External RAM chip select, Active-Low
External memory byte select (MSB), Active-Low
External memory byte select (LSB), Active-Low
I/O bank 1, chip select 1, Active-Low
I/O bank 1, chip select 0, Active-Low
I/O bank 0, chip select 1, Active-Low
I/O bank 0, chip select 0, Active-Low
Wait signal for I/O bank 0/1. A device slower than the register set value can be connected by inputting this signal (wait
when 1).
AHB clock for external bus
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
O
I/O
Address of the bus that connects external RAM, external ROM, external IO and external DRAM
Data bus that connects external RAM, external ROM, external IO and external DRAM
Secondary
Secondary
I/O
I
O
O
Description
This pin is used during debugging. Normally set this input High
This pin is used during debugging. Normally, do not connect this pin to any trace
This pin is used during debugging. Normally, do not connect this pin to any trace
Primary/
Secondary
External Bus Control Signals (DRAM)
XSDCS_N
XCAS_N
XRAS_N
XSDCLK
XSDCKE
XDQM1
XDQM0
DMA Control
DREQ
DREQCLR
TCOUT
General-Purpose I/O Port
PIOA[15:0]
PIOB[15:0]
PIOC[15:0]
PIOD [15:0]
PIOE[15:0]
I/O
I/O
I/O
I/O
I/O
This is a general-purpose port. – Because this port has a secondary function, it cannot be used as a port if its secondary
function is used.
This is a general-purpose port. – Because this port has a secondary function, it cannot be used as a port if its secondary
function is used.
This is a general-purpose port.. – Because this port has a secondary function, it cannot be used as a port if its secondary
function is used.
This is a general-purpose port.. – Because this port has a secondary function, it cannot be used as a port if its secondary
function is used.
This is a general-purpose port.
PIOE[15] is 5-V tolerant.
PIOE[15:12] can be used as IRQ (interrupt requests)
This is a general-purpose port.. – Because this port has a secondary function, it cannot be used as a port if its secondary
function is used.
Primary
Primary
Primary
Primary
Primary
I
O
O
DMA request signal. This signal is used if the DREQ type is set by the DMA controller.
DREQ signal clear request.
The DMA device turns off the DREQ signal when this signal is output.
This signal notifies the DAM device that the last transfer has been started.
Secondary
Secondary
Secondary
O
O
O
O
O
O
O
SDRAM chip select, Active-Low
Column address strobe (SDRAM), Active-Low
Row address strobe (SDRAM), Active-Low
Clock for SDRAM
Clock enable (SDRAM)
Input/output mask (MSB)
Input/output mask (LSB)
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
Secondary
PIOF[6:0]
µPLAT-SIO/UART
I/O
Primary
Oki Semiconductor • 9