欢迎访问ic37.com |
会员登录 免费注册
发布采购

ML671000 参数 Datasheet PDF下载

ML671000图片预览
型号: ML671000
PDF下载: 下载PDF文件 查看货源
内容描述: OKI的CMOS 32位单片微控制器内置的USB设备控制器 [OKI’s CMOS 32-Bit Single-Chip Microcontroller with Built-in USB Device Controller]
分类和应用: 微控制器外围集成电路时钟
文件页数/大小: 25 页 / 261 K
品牌: OKI [ OKI ELECTRONIC COMPONETS ]
 浏览型号ML671000的Datasheet PDF文件第5页浏览型号ML671000的Datasheet PDF文件第6页浏览型号ML671000的Datasheet PDF文件第7页浏览型号ML671000的Datasheet PDF文件第8页浏览型号ML671000的Datasheet PDF文件第10页浏览型号ML671000的Datasheet PDF文件第11页浏览型号ML671000的Datasheet PDF文件第12页浏览型号ML671000的Datasheet PDF文件第13页  
FEDL671000-02  
1
Semiconductor  
ML671000  
UART/Synchronous Serial Port  
The UART/synchronous serial port is a serial port that operates in two communication modes, the UART  
mode and synchronous mode. In the UART mode, characters units are synchronized according to the  
controlled start bit and stop bit, and data is transferred. In the synchronous mode, the data transfer is  
synchronized to the controlled shift clock.  
-
-
-
-
-
Built-in dedicated baud rate generator  
Data length:7 or 8 bits  
Stop bit:  
Parity:  
1 or 2 bits (UART mode only)  
even or odd parity (none in the synchronous mode)  
Detection of receive errors: parity error, framing error, and overrun error  
(only overrun error in the synchronous mode)  
Full-duplex operation  
-
Interrupt Controller  
The interrupt controller manages interrupt requests from 9 external sources and 13 internal sources, and passes  
them on to the CPU as interrupt request (IRQ) or fast interrupt request (FIQ) exception requests. An interrupt  
level can be set for each interrupt and priority can be controlled.  
-
Supports 9 external interrupt sources from nEFIQ and nEIR [7:0] pins and 13 internal interrupt sources  
from internal peripherals such as the USB device controller and the timers.  
-
-
To simplify the control of interrupt priority, 8 interrupt levels can be set for each interrupt source.  
The interrupt controller assigns a unique interrupt number to each interrupt source to permit rapid  
branching to the appropriate routine.  
Direct Memory Access (DMA) Controller  
The direct memory access (DMA) controller is used instead of the CPU to transfer data between internal  
memory, internal peripherals, external memory and memory mapped external devices.  
-
-
-
-
-
-
-
-
Built-in 2 channels  
Supports 64MB address area  
Transfer data size:  
Maximum transferring:  
Addressing modes:  
Bus modes:  
8 or 16 bits  
65536 times  
single or dual address mode  
cycle-steal or burst mode  
Supports transfer requests from nDREQ[0:1] pins, internal peripheral devices and software.  
Generates transfer complete interrupt requests when transfer is completed.  
9/25