Semiconductor
ML670100
PIN DESCRIPTIONS (Cont.)
Type
Signal
Name
OSC0
I/O
Direction
Input
Description
Clock
control
This pin is for connecting a crystal oscillator. If an external
clock is used, supply it to this pin.
OSC1
Output
This pin is for connecting a crystal oscillator. If an external
clock is used, leave this pin open.
CLKOUT Output
This output is the internal system clock signal.
Connect this pin to VDD or ground to indicate the frequency
range for the basic clock.
FSEL
Input
PLLEN
Input
Connect this pin to VDD to enable the built-in phase-looked
loop. If the PLL is not used because an external clock with a
guaranteed duty is available, connect this pin to ground.
This input controls the oscillation frequency of the PLL's
voltage-controlled oscillator. Connect it to ground.
"L" level input to this pin produces an external system reset for
this LSI. "H" level input then causes execution to resume from
address 0x000000.
VCOM
Input
Input
System nRST
control
DBSEL
Input
Input
Input
During a system reset of this LSI, this input specifies the width
of the external data bus for bank 0. Connect this pin to VDD for
a data bus width of 16bits and to ground for 8bits.
During a system reset of this LSI, this input controls the use of
the internal ROM. Connect this pin to VDD to enable the ROM
and to ground to disable it.
During a system reset of this LSI, this input controls the initial
pin functions for the I/O port 8 pins(PIO8[7:0]). Connect this
pin to VDD to initialize the port for its secondary function, the
debugging interface, and to ground for I/O.
nEA
TEST
Power
Supply
VDD
Input
Input
Input
Input
These pins are this LSI's power supply pins. Connect them all to
VDD.
These pins are this LSI's ground pins. Connect them all to
ground.
This pin is the analog-to-digital converter's power supply.
Connect it to VDD.
This pin is the analog-to-digital converter's ground pin.
Connect it to ground.
GND
AVDD
AGND
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