FEDL66525-02
OKI Semiconductor
ML66525 Family
PIN CONFIGURATION (TOP VIEW)
P3_2/
RDn
P0_5/ P0_3/ P13_1/
D5 D3 EXINT9
VDD
_
NC
VDD_IO
NC
OSC0
GND
XT0
NMI
NC
N
M
L
CORE
P3_3/ P3_1/ P0_4/ P0_2/ P0_1/
WRn PSENn D4 D2 D1
P15.2/ P15_3/
RXC6 TXC6
GND
V
DD_IO OSC1n TEST
XT1n VDD_IO
P4_0/
A0
VDD
_
P0_7/ P0_6/ P0_0/ P13_0/
P15_0/ P15_1/
RXD6 TXD6
NC
NC
NC
NC
NC
NC
EAn
NC
NC
NC
NC
NC
RESn
CORE
D7
D6
D0
EXINT8
P4_2/
A2
P4_1/
A1
P10_4/ P10_2/ P10_5/
SIOO4 SIOO3 SIOI4
NC
NC
NC
NC
K
J
P4_4/ P4_5/ P4_3/
A4 A5 A3
P10_3/
NC
NC
NC
NC
NC
NC
NC
NC
SIOCK4
P4_6/ P4_7/ P1_0/
P10_0/ P10_1/
SIOCK3 SIOI3
V
DD_IO
H
G
F
A6
A7
A8
P1_1/ P1_2/
A9 A10
P8_3/ P8_2/
TXC1 RXC1
NC
GND
NC
P1_5/ P1_4/ P1_3/
P8_1/ P8_0/
TXD1 RXD1
A13
A12
A11
P7_6/
P7_7/
PWM1O
UT
P1_7/
A15
FLAMO
NC
NC
NC PWM0O
UT
E
D
C
B
A
D
P1_6/
A14
P6_2/
NC
P6_3/
NC
VTM
VREF
NC
NC
NC
NC
NC
NC
NC
EXINT2
EXINT3
P2_1/ P2_0/
A17 A16
P12_1/ P12_3/ P21_4/
P20_1/ P20_7/
P6_0/
NC
P6_1/
VDD_IO
GND
NC
D-
AI1
AI3
FRB
FD1
FD7
EXINT0
EXINT1
P2_3/ P2_2/
P21_1/ P21_3/
FWRn FALE
P20_2/ P20_3/ P20_5/
P9_0/
AGND
PUCTL
A19
NC
13
A18
FD2
FD3
FD5
GND
4
VBUSIN
VDD
_
P12_0/ P12_2/ P21_0/ P21_2 P20_0 P20_4/ P20_6/
D+
VBUS
NC
CORE
AI0
AI2
FRDn /FCLE
/FD0
FD4
FD6
12
11
10
9
8
7
6
5
3
2
1
144-pin Plastic LFBGA
A symbol with “n” suffixed indicates an active Low pin.
[Note] Don’t connect NC pins with others.
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