FEDL63611A-01
OKI Semiconductor
ML63611A
MASK OPTIONS
There are nine items in the mask option of the ML63611A.
Make the settings for the following items using the MOGTOOL mask option generator. Refer to the
“MOGTOOL Mask Option Generator User’s Manual” for details of the method of making the settings.
1)
Selection of power supply voltage
Select a power supply specification for the power supply voltage to be used as either a 1.5 V power
supply specification (1.3 to 1.7 V) or a 3.0 V power supply specification (1.8 to 3.6 V).
!
2)
Note:
When a 1.5 V power supply specification (OPTION A and OPTION B) is selected, the halver circuit and the
battery low detect circuit cannot be used.
Selection of the regulator circuit for the LCD bias reference voltage
Select the LCD bias reference voltage as either the output of the regulator circuit or the power supply
voltage.
!
Note:
When power is supplied from the battery:
When “Without the regulator circuit for the LCD bias reference voltage” is selected with the mask option, the
LCD bias reference voltage will be generated based on the power supply voltage. When a 1.5 V power supply
specification is selected, V
DD1
will be the pin for the LCD bias reference voltage, and when a 3.0 V power
supply specification is selected, V
DD2
will be the pin for the LCD bias reference voltage. In addition, the LCD
bias voltage will decrease as the power supply voltage decreases, causing the display density of the LCD
panel to thin down.
When “With the regulator circuit for the LCD bias reference voltage” is selected, the display density will be kept
constant even if the battery voltage decreases.
3)
Selection of the initial state of Port 0
Select the initial state of Port 0 as either “input with pull-down resistor” or “input with pull-up resistor”.
This selection determines the initial value of P0PUD (P0CON1).
!
4)
Note:
This selection applies to all four bits and it is not possible to make this selection separately for each bit.
Selection of simultaneous key depression reset function of Port 0
Select the simultaneous key depression reset function and the number of bits (pins) that can be pressed
simultaneously.
The pins that are set according to the number of bits pressed simultaneously are fixed as follows:
2 bits: P0.0, P0.1; 3 bits: P0.0, P0.1, P0.2; 4 bits: P0.0, P0.1, P0.2, P0.3.
!
5)
Note:
The system reset mode will be entered at the second falling edge of the 1 Hz signal.
Selection of MDB pin output voltage level
Select whether to make the output voltage level of the melody output pin (MDB: negative logic) either
V
DD
or V
SS
when the melody is OFF.
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OKI [ OKI ELECTRONIC COMPONETS ]
