¡ Semiconductor
ML63187/63189B
Table 1 Pin Descriptions (Basic Functions) (continued)
Pin No.
Pad No.
Function Symbol
Type
Description
Input pins for testing.
ML63187ML63189BML63187ML63189B
TST1
TST2
61
62
63
64
79
80
89
90
I
I
A pull-down resistor is internally connected to these pins.
The user cannot use these pins.
Test
Reset input pin.
Setting this pin to "H" level puts this device into a
reset state.
RESET
58
60
76
86
I
Reset
Then, setting this pin to "L" level starts executing an
instruction from address 0000H.
A pull-down resistor is internally connected to this pin.
Melody output pin (non-inverted output)
Melody output pin (inverted output)
4-bit input ports.
MD
MDB
63
64
66
67
86
87
88
89
82
83
84
85
78
79
80
81
81
82
91
O
O
Melody
92
P0.0/INT5
P0.1/INT5
P0.2/INT5
P0.3/INT5
P9.0
110
111
112
113
106
107
108
109
102
103
104
105
Pull-up resistor input, pull-down resistor input, or
high-impedance input is selectable for each bit.
Applied to the ML63189B only.
—
—
—
—
—
—
I
4-bit input-output ports.
In input mode, pull-up resistor input, pull-down
resistor input, or high-impedance input is selectable
for each bit.
P9.1
I/O
I/O
P9.2
P9.3
In output mode, P-channel open drain output,
N-channel open drain output, CMOS output, or
high-impedance output is selectable for each bit.
P9.0 to P9.3 and PA.0 to PA.3 are applied to the
ML63189B only.
PA.0
PA.1
PA.2
PA.3
Port
PB.0/INT0/
TM0CAP/
TM0OVF
PB.1/INT0/
TM1CAP/
TM1OVF
75
76
74
75
88
89
98
99
I/O
I/O
PB.2/INT0/T02CK 77
PB.3/INT0/T13CK 78
76
77
70
71
72
73
90
91
84
85
86
87
100
101
94
PE.0/SIN
PE.1/SOUT
PE.2/SCLK
PE.3/INT2
71
72
73
74
95
96
97
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