PEDL60852-01
Semiconductor
1
ML60852
PIN DESCRIPTION
Pin name
D+, D-
XIN, XOUT
AD7:AD0
A6:A0
D15:D8
CS
RD
WR
INTR
DREQ0
DREQ1
DACK0
DACK1
ALE/PUCTL
ADSEL
RESET
TEST1, TEST2
V
CC
GND
Pin count
2
2
8
7
8
1
1
1
1
1
1
1
1
1
1
1
2
2
2
44
I/O
I/O
—
I/O
I
I/O
I
I
I
O
O
O
I
I
I,O
I
I
I
USB data
Pins for external crystal
Data bus (LSB)/address inputs
Address inputs
Data bus (MSB)
Chip select signal input pin. Active “L”
Read signal input pin. Active “L”
Write signal input pin. Active “L”
Interrupt request signal output pin
DMA0 request output pin
DMA1 request output pin
DMA0 reception signal input pin
DMA1 reception signal input pin
Address latch enable signal input pin/pull-up control pin
Address input format select input pin
Reset signal input pin
Test pin. (Normally at “L”)
3.3 V power supply pin
GND
Description
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