PEDL60851C-02
1
Semiconductor
ML60851C
INTERNAL REGISTERS
Addresses and Names of Registers
Addresses
Register
Register name
Page
Read
Write
A5:A0
Symbol
A7, A6
A7, A6
00h
01h
02h
03h
00h
01h
02h
03h
01b
01b
01b
01b
—
—
—
EP0RXFIFO
EP1RXFIFO
EP2RXFIFO
Endpoint 0 Receive FIFO Data
Endpoint 1 Receive FIFO Data
Endpoint 2 Receive FIFO Data
Reserved
7
7
8
—
—
11b
11b
11b
11b
EP0TXFIFO
EP1TXFIFO
EP2TXFIFO
EP3TXFIFO
Endpoint 0 Transmit FIFO Data
Endpoint 1 Transmit FIFO Data
Endpoint 2 Transmit FIFO Data
Endpoint 3 Transmit FIFO Data
9
9
—
—
10
10
—
00h
01h
02h
03h
04h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
11b
11b
11b
11b
11b
11b
11b
11b
11b
11b
11b
—
01b
01b
—
DVCADR
Device Address Register
Device Status Register
11
11
13
13
14
15
19
19
20
DVCSTAT
PKTERR
Packet Error Register
—
FIFOSTAT1
FIFOSTAT2
PKTRDY
FIFO Status Register 1
—
FIFO Status Register 2
01b
—
Endpoint Packet-Ready Register
Endpoint 0 Receive-Byte Count Register
Endpoint 1 Receive-Byte Count Register
Endpoint 2 Receive-Byte Count Register
Reserved
EP0RXCNT
EP1RXCNT
EP2RXCNT
—
—
—
—
REVISION
CLRFIFO
Revision Register
21
21
22
23
23
24
24
24
24
25
25
26
27
28
30
31
01b
01b
—
Transmit FIFO Clear Register
System Control Register
bmRequestType Setup Register
bRequest Setup Register
wValueLSB Setup Register
wValueMSB Setup Register
wIndexLSB Setup Register
wIndexMSB Setup Register
wLengthLSB Setup Register
wLengthMSB Setup Register
Assertion Select Register
Interrupt Enable Register
Interrupt Status Register
DMA Control Register
—
SYSCON
11b
11b
11b
11b
11b
11b
11b
11b
11b
11b
11b
11b
11b
—
bmRequestType
bRequest
—
—
wValueLSB
wValueMSB
wIndexLSB
wIndexMSB
wLengthLSB
wLengthMSB
POLSEL
—
—
—
—
—
01b
01b
—
INTENBL
INTSTAT
01b
01b
—
DMACON
DMAINTVL
DMA Interval Register
Reserved
5/67
OKI [ OKI ELECTRONIC COMPONETS ]
