––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––– ■ MG113P/114P/115P/73P/74P/75P ■
DC Characteristics (V Core = 2.25 to 2.75 V, V I/O = 3.0 to 3.6 V, V = 0 V, T = -40° to +85°C)
DD
DD
SS
j
Rated Value
[1]
Parameter
High-level input voltage
Symbol
VIH
Conditions
Min.
2.0
-0.3
–
Typ.
Max.
VDD +0.3
0.8
2.0
–
Unit
TTL input (normal), VDD = VDD I/O
TTL input (normal)
–
–
Low-level input voltage
VIL
Vt+
Vt-
TTL- level Schmitt
Trigger input buffer
Threshold voltage
TTL input
1.5
1.0
0.5
–
0.7
0.4
VDD -0.2
2.4
–
∆Vt
VOH
Vt+ - Vt-
–
V
High-level output voltage (Output buffer)
Low-level output voltage (Output buffer)
High-level input current (Input buffer)
Low-level input current (Normal input buffer)
IOH = -100 µA, VDD = VDD I/O
IOH = -1, -2, -4, -6, -8, -12, -24 mA
IOL = 100 µA
–
–
–
VOL
–
0.2
0.4
10
I
OL = 1, 2, 4, 6, 8, 12, 24 mA
–
–
IIH
VIH = VDD
–
–
VIH = VDD (50-kΩ pull-down)
VIL = VSS
10
66
–
200
10
µA
mA
µA
IIL
-10
-200
-3.3
-10
10
V
IL = VSS (50-kΩ pull-up)
-66
-1.1
–
-10
-0.3
10
VIL = VSS (3-kΩ pull-up)
3-state output leakage current
(Normal input buffer)
IOZH
VOH = VDD
V
OH = VDD (50-kΩ pull-down)
66
–
200
10
IOZL
VOL = VSS
-10
-200
-3.3
VOL = VSS (50-kΩ pull-up)
VOL = VSS (3-kΩ pull-up)
Output open, VIH = VDD, VIL = VSS
-66
-1.1
-10
-0.3
mA
µA
Stand-by current [2]
IDDQ
Design Dependent
1. Typical condition is VDD I/O = 3.3 V, VDD Core = 2.5 V, and Tj = 25°C on a typical process.
2. RAM/ROM should be in powerdown mode.
Oki Semiconductor
7
OKI [ OKI ELECTRONIC COMPONETS ]
