FEDD56V62160E-01
OKI Semiconductor
MD56V62160E
PIN CONFIGURATION (TOP VIEW)
V
CC
1
DQ1 2
V
CC
Q 3
DQ2 4
DQ3 5
V
SS
Q 6
DQ4 7
DQ5 8
V
CC
Q 9
DQ6 10
DQ7 11
V
SS
Q 12
DQ8 13
V
CC
14
LDQM 15
WE
16
CAS
17
RAS
18
CS
19
A13 20
A12 21
A10 22
A0 23
A1 24
A2 25
A3 26
V
CC
27
54 V
SS
53 DQ16
52 V
SS
Q
51 DQ15
50 DQ14
49 V
CC
Q
48 DQ13
47 DQ12
46 V
SS
Q
45 DQ11
44 DQ10
43 V
CC
Q
42 DQ9
41 V
SS
40 NC
39 UDQM
38 CLK
37 CKE
36 NC
35 A11
34 A9
33 A8
32 A7
31 A6
30 A5
29 A4
28 V
SS
54-Pin Plastic TSOP(II)
(K Type)
Pin Name
CLK
CS
CKE
A0–A10
A11
RAS
CAS
WE
Function
System Clock
Chip Select
Clock Enable
Address
Bank Select Address
Row Address Strobe
Column Address Strobe
Write Enable
Pin Name
UDQM, LDQM
DQi
V
CC
V
SS
V
CC
Q
V
SS
Q
NC
Function
Data Input/ Output Mask
Data Input/ Output
Power Supply (3.3 V)
Ground (0 V)
Data Output Power Supply (3.3 V)
Data Output Ground (0 V)
No Connection
Note : The same power supply voltage must be provided to every V
CC
pin and V
CC
Q pin.
The same GND voltage level must be provided to every V
SS
pin and V
SS
Q pin.
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