FEDD56V62160E-01
OKI Semiconductor
MD56V62160E
Mode Set Address Keys
Single Write
CAS
Latency
Burst Type
Burst Length
A9
0
1
BRSW
Normal
Single Write
A6 A5 A4
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
CL
Reserved
1
2
3
Reserved
Reserved
Reserved
Reserved
A3
0
1
BT
Sequential
A2 A1 A0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
BT = 0
1
2
4
8
BT = 1
1
2
4
8
Interleave
Reserved Reserved
Reserved Reserved
Reserved Reserved
Full Page
Reserved
Notes: A7, A8, A10, A11, A12 and A13 should stay “L” during mode set cycle.
MD56V62160E supports two methods of Power on Sequence.
POWER ON SEQUENCE 1
1. With inputs in NOP state, turn on the power supply and start the system clock.
2. After the V
CC
voltage has reached the specified level, pause for 200
µs
or more with the input kept in
NOP state.
3. Issue the precharge all bank command.
4. Apply a CBR auto-refresh eight or more times.
5. Enter the mode register setting command.
POWER ON SEQUENCE 2
1. With inputs in NOP state, turn on the power supply and start the system clock.
2. After the V
CC
voltage has reached the specified level, pause for 200
µs
or more with the input kept in
NOP state.
3. Issue the precharge all bank command.
4. Enter the mode register setting command.
5. Apply a CBR auto-refresh eight or more times.
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