¡ Semiconductor
MSM6295
PIN DESCRIPTION
Pin
37
38
39
40
41
42
43
44
3
Symbol
I
0
I
1
I
2
I
3
I
4
I
5
I
6
I
7
WR
Type
I/O
I/O
I/O
I/O
I
I
I
I
I
Write enable input
Data is written on the data bus of I
0
to I
7
. The data is written when
WR
goes low.
2
RD
(Note)
I
Read enable input
The output busy state of channels 1 to 4 on the data bus of I
0
to I
3
, can be
read using this input. A high level indicates busy.
4
CS
I
Chip select input
Input "L" level either when
WR
signal is input or when
RD
signal is input.
8
RESET
I
Reset input
Reset condition is available by inputting "L" level.
All functions are suspended during reset.
18
to
35
9
to
16
7
A
0
to
A
17
(Note)
D
0
to
D
7
SS
I
to
I
I
to
I
I
Sampling frequency select input
When oscillation frequency is 1.056 MHz or 4.224 MHz, the following
choices are available by inputting "H" level or "L" level to SS.
SS = "H"
Oscillation frequency 1.056 MHz
8 kHz
Oscillation frequency 4.224 MHz
36
5
6
17
1
DAO
XT
XT
V
DD
V
SS
O
I
O
—
—
Voice synthesis output
Voice synthesized analog signal is output from this pin.
Crystal oscillator pin
Crystal oscillator pin
Power supply pin. Insert a bypass capacitor of 0.1
mF
or more between
this pin and the V
SS
pin.
Ground
32 kHz
SS = "L"
6.4 kHz
25.6 kHz
Voice data inputs
Address outputs
These pins are to address the external ROM in which voice data is stored.
Description
Instruction bus and condition outputs
These pins are inputs for phrase specification. Maximum number of
phrases is 127. I
0
to I
3
pins are also outputs of the operating state, busy
state, for channels 1 to 4 and are further used to select the channel
attenuation rate.
Note:
The MSM6295VRS does not have the
RD
and A17 pins.
OKI [ OKI ELECTRONIC COMPONETS ]
