s
KGL4217/KGL4221/KGL4222
s
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PACKAGE OUTLINE
11.8
±0.3
9.61 SQ
7.4 SQ
24
19
0.50
0.50
.064
±0.2
0.20
1
18
Top View
6
13
7
12
1.27
6.35
0.30
0.125
Dimension in mm.
PIN CONFIGURATION
Pin No
1
2
3
4
5
6
7
8
9
10
11
12
Signal
GND
QN
GND
GND
Q
GND
GND
DR2
GND
DR1
DR1
DR1
Ground
Data output (neg)
Ground
Ground
Data output (pos)
Ground
Ground
Input threshold adjustment
Ground
External capacitance
External capacitance
External capacitance
Pin Definition
Pin No
13
14
15
16
17
18
19
20
21
22
23
24
Signal
GND
GND
GND
GND
DA
GND
VDD
GND
GND
GND
VDD
GND
Ground
Ground
Ground
Ground
Data input
Ground
Power supply
Ground
Ground
Ground
Power supply
Ground
Pin Definition
6
Oki Semiconductor