■ KGL4217/KGL4221/KGL4222 ■ –––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
PACKAGE OUTLINE
11.8 ±0.3
9.61 SQ
7.4 SQ
0.50
0.50
.064 ±0.2
0.20
24
19
1
18
Top View
6
13
7
12
1.27
0.30
0.125
6.35
Dimension in mm.
PIN CONFIGURATION
Pin No
Signal
GND
QN
Pin Definition
Pin No
13
Signal
GND
GND
GND
GND
DA
Pin Definition
1
2
Ground
Ground
Ground
Ground
Ground
Data input
Ground
Data output (neg)
Ground
14
3
GND
GND
Q
15
4
Ground
16
5
Data output (pos)
Ground
17
6
GND
GND
DR2
GND
DR1
DR1
DR1
18
GND
VDD
GND
GND
GND
VDD
GND
7
Ground
19
Power supply
Ground
8
Input threshold adjustment
Ground
20
9
21
Ground
10
11
12
External capacitance
External capacitance
External capacitance
22
Ground
23
Power supply
Ground
24
6
Oki Semiconductor