■ KGL4208/KGL4209/KGL4210 ■ –––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
BLOCK DIAGRAM
V
V
DD
DD
V
DD
D
C
D
C
Q
Q
Q
CBFF
CBFF
CK
CR
Q
Q
50 Ω
Note: The number of KGL4208, 4209, and 4210 flip-flop stages are 2, 3, and 4, respectively.
CK
CR
Q
Clock Input Terminal
Reference Voltage Bias Terminal
Divided Frequency Output Terminal
Power Supply of Internal Circuit
V
DD
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Parameter
Supply Voltage
Symbol
VDD
VCI
Min.
-0.3
-0.3
-45
Max.
2.3
Units
V
Clock Input Voltage
1.5
V
Temperature at Package Base Under Bias
Storage Temperature
Ts
100
125
°C
°C
Tst
-45
Exceeding these maximum ratings could cause immediate damage or lead to permanent deterioration of the device.
Electrical Characteristics
V = 2 V ± 0.1 V, V = 2 V ± 0.1 V, Ts = 0°C to 70°C
B
DD
Parameter
Symbol
DAR
PW
Min.
Typ.
10
Max.
Units
Operating Data Bit Rate Range
Power Dissipation
Gbps
W
V
0.08
0.9
0.1
0.7
0.1
0.1
1.25
0.3
High-Level Clock Input Voltage
Low-Level Clock Input Voltage
High-Level Output Voltage
Low-Level Output Voltage
VIH
0.6
-0.1
0.5
0
VIL
V
VOH
VOL
0.9
V
0.2
V
2
Oki Semiconductor