■ KGL4201 ■ –––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
PIN CONFIGURATION
14.84 SQ
13.01 SQ
10.67 SQ
0.7 ±0.05
0.9 ±.005
1.7 ±0.15
40
31
1
30
2 ±0.3
21
10
14.84 SQ
20
11
13.01 SQ
0.4 ±0.05
11.0 SQ
1.27
0.125 ±0.05
40
31
1
30
Pin Configuration
Pin
1
Name
Pin
Pin Name
Pin
21
22
23
24
25
26
Pin Name
VDD
GND
GND
CK
Pin
31
32
33
34
35
36
37
38
39
40
Pin Name
GND
VDD
D7
GND
Q
11
12
13
14
15
16
17
18
19
20
GND
VDD
D0
2
3
GND
Q
4
GND
D2
GND
D5
21
10
5
GND
GND
1/8CK
GND
1/8CK
VB
GND
GND
RCK
11
20
6
D4
D3
1.27
0.4 ±0.05
7
GND
D6
27
28
29
GND
D1
8
GND
GND
GND
9
GND
G2N±D0.3
VB
10
30 1.7 ±0.15
0.9 ±.005
VDD
0.7 ±0.05
BLOCK DIAGRAM
D0
D2
D4
D6
4:1 MUX
Q
Q
2:1
MUX
Output
Latch
D1
D3
D5
D7
4:1 MUX
1/8CK
1/8CK
1/2
Divider
1/4 Divider
CK
4
Oki Semiconductor