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LKT
Low Voltage Multilayer Chip Ceramic
Capacitor
7. Temperature Coefficient of Capacitance
Dielectrics
Specification
Testing Condition
Measure capacitance under follow table list temperature:
Temperature coefficient within ±30ppm/℃
Cp drift within ±0.2% or ±0.05pF
STEP
1
2
3
4
5
NPO, X7R
25 ±2
-55±3
25 ±2
125±3
25 ±2
X5R
Y5V
NPO
25 ±2
-55±3
25 ±2
85±3
25 ±2
25 ±2
-30±3
25 ±2
85±3
25 ±2
X7R/X5R
Capacitance change within ±15%
1) NPO
The capacitance drift is calculated by dividing the
differences between the maximum and minimum measured
values in the step 1,3 and 5.
The temperature coefficient is determined using the
Capacitance measured in step 3 as a reference.
2) X7R ,X5R and Y5V
Y5V
Capacitance change within +22%, -82%
The ranges of capacitance change compared within the
above 25℃ value over the temperature ranges shall be
within the specified ranges.
8. Adhesion
Dielectrics
Specification
Testing Condition
The pressurizing force shall be 10N (=1000g*f) and the
duration of application shall be 10±1sec.
hooked jig
NPO
X7R/X5R
Y5V
No removal of the terminations or other
defect shall occur.
board
r=0.5
hip
cross-section
9. Solderability of Termination
Dielectrics
Specification
Testing Condition
NPO
95% min. coverage of both terminal Solder temperature: 230±5℃
X7R/X5R
Y5V
electrodes and less than 5% have pin holes Dipping time: 2±1 seconds.
or rough spots.
Completely soak both terminal electrodes in solder
10. Resistance to leaching
Dielectrics
Specification
Testing Condition
95% min. coverage of both terminal
electrodes and less than 5% have pin holes
or rough spots.
NPO
X7R/X5R
Y5V
Solder temperature: 270±5℃
Dipping time: 10±1 seconds.
Completely soak both terminal electrodes in solder
No remarkable visual damage.
4
KINGTRONICS [ Kingtronics International Company ]
