®
X2Y FILTER & DECOUPLING
CAPACITORS
OPTIMIZING X2Y PERFORMANCE
X2Y® low inductance capacitors deliver excellent performance in EMI/RFI filtering and power delivery bypass / decoupling applica-
tions. Physical and electrical placement on the PCB is critical in achieving best results.
In EMI Filter applications stray inductance should be minimized between signals and the A and B capacitor pads. Use star or daisy
chain routes, rather than “T” to capacitor pads as shown in Figure 1.
For PDN bypass applications Figure 2 compares the X2Y® recommended layout against a poor layout. Because of its long extents
from device terminals to vias, and the wide via separation, the poor layout exhibits approximately 200ꢀ L1 inductance, and 150ꢀ L2
inductance compared to recommended X2Y layouts.
As with any ceramic capacitor, hand soldering is discouraged due to the risk of thermal crack failure. If hand soldering is employed for
lab evaluation, pre-heat the assembly and utilize contact-less soldering methods such as a hot air tool.
Figure 1: EMI Filtering Recommended Layouts
Figure 2: Decoupling Layout
Good Layout
Poor Layout
Z
Z
V
V
U
U
X
X
V
V
V
V
SOLDER
PAD
RECOMMENDATIONS
V
V
Y
G
Y
G
0402 (X07)
IN mm
0603 (X14)
0805 (X15)
1206 (X18)
1210 (X41)
1410 (X44)
1812 (X43)
IN
mm
IN
mm
IN
mm
IN
mm
IN
mm
IN
mm
3.18
1.02
3.30
1.14
4.83
5.33
X
Y
G
V
0.020
0.020
0.024
0.015
0.039
0.064
0.51
0.51
0.61
0.38
0.99
1.63
0.035
0.025
0.040
0.020
0.060
0.090
0.89
0.64
1.02
0.51
1.52
2.29
0.050
0.035
0.050
0.022
0.080
0.120
1.27
0.89
1.27
0.56
2.03
3.05
0.065
0.040
0.080
0.040
0.120
0.160
1.65
1.02
2.03
1.02
3.05
4.06
0.100
0.040
0.080
0.045
0.160
0.160
2.54
1.02
2.03
1.14
4.06
4.06
0.100
0.040
0.100
0.045
0.160
0.180
2.54
1.02
2.54
1.14
4.06
4.57
0.125
0.040
0.130
0.045
0.190
0.210
U
Z
Use of solder mask beneath component is not recommended.
6
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