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01/99
IFPA300, IFPA301
Monolithic JFET Preamplifier
Absolute maximum ratings at TA = 25°C
All pins (except Input) referenced to Bias 3
Input to Bias 3
Description & Features
85 dB
Ø V
The IFPA300 series is an inverting transimpedance
amplifier featuring extremely low noise and a wide
gain-bandwidth suitable as a charge-sensitive pre-
amplifier for a broad range of applications.
Power Dissipation
Derating Factor
225 mW
1.8 mW/°C
150°C
Operating Temperature
The monolithic IFPA300 series contain 8 n-channel
epitaxial-channel diffused-gate JFETs to achieve
optimally low 1/f noise performance over a wide
temperature range (120K-300K).
At this time, there are two units in this family.
The 300/301 Series gives more flexibility with respect
to output transistor drain.
DC open loop gain
GBW
85 dB
200 MHz
e¯N @ 10 Hz
3.0 nV/√Hz
The 310/311 Series ties the output transistor drain to
the V line.
DD
General Specifications
Power Dissipation at VDD = 12 V
Input Leakage Current (T = 300 K)
Input-Referred Noise Voltage (f = 10 kHz)
Input-Referred Noise Voltage (f = 10 Hz)
Output Range at VDD = 12 V
<100 mW
10 pA
Simplified Schematic Circuit
0.6 nV/√Hz
V
DD
3.0 nV/√Hz
J4
J3
4.0 V (5.0 V Max)
Substrate
J7
Designed to drive 50Ω load.
Open
Drain
Output
Charge Sensitive
J8
Preamplifier Specifications
Bias 1
The IFPA300 Series is actually tailored to detector
capacitance in the 100 Ð 1000 pF range.
J2
J6
Open
Source
Output
Bias 2
Input
Input Open-Loop Capacitance
60 pF
20 ns
Rise Time (CD = 500 pF, Cf = 33 pF)
J1
J5
Equivalent Noise Charge
(Measured with semigaussian shaping, peaking
time = t )
p
Bias 3
V
SS
4200 e– rms at CD @ 500 pF, t = 0.2 µm
p
Packages & Test Circuit Overside
3200 e– rms at CD @ 500 pF, t = 1.0 µm
p
4200 e– rms at CD @ 500 pF, t = 4.0 µm
p
1000 N. Shiloh Road, Garland, TX 75042
(972) 487-1287 FAX (972) 276-3375
www.interfet.com
INTERFET [ INTERFET CORPORATION ]
