Digital Multi-Phase Buck Controller
ASP1212
FEATURES
DESCRIPTION
Intel VR11.x compliant Digital PWM Controller
The ASP1212 is an 8-phase digital synchronous buck
controller for core regulation of high-performance Intel®
VR11.1 and VR11.0 platforms. The ASP1212 is fully
compliant with VR11.1 including Power Status Indicator
(PSI) and for improved light load efficiency and accurate
current output (IMON).
Programmable 1-phase to 8-phase operation
Customized Digital Over-Clocking features an
easy-to-use SMBus Gamer command and a
Gamer VID control up to 2.3V, Gamer Vmax,
VID Override or Track, Digital Load-Line Adjust,
Gamer OC/OVP, Gamer OFF pin and Gamer OTP
The IR ASP1212 includes a customized set of digital over-
clocking features which require no external components.
Gaming applications can use the SMBus interface to place
the VRD into “Gamer Mode” to extend VID up to 2.3V with
6.25 mV resolution.
IR Efficiency Shaping features a Variable Gate Drive
and Dynamic Phase Control
1-phase to 4-phase PSI for Light Loads
Adaptive Transient Algorithm minimizes capacitors
Designed for use with coupled inductors
Enables Thermal Phase Balancing
The ASP1212 deploys a number of efficiency shaping
features such as variable MOSFET gate drive versus load,
programmable PSI modes for optimum light-load along
with programmable phase shedding to autonomously
add/drop phases versus load.
SMBus Fault Indicators: OVP, UVP, OCP, OTP
SMBus interface for configuring and monitoring;
SMBus commands include monitoring input
current and power
ASP1212 supports three NTC temperature sensors to
report temperature and trigger VR HOT and OTP faults.
Digital thermal balancing allows proportional current
imbalance between phases.
Compatible with IR ATL Drivers and tri-state Drivers
9 bytes of NVM storage available for customer use
+3.3V supply voltage; 0ºC to 85ºC Ambient
operation
The ASP1212 provides extensive OVP, UVP, OCP and OTP
fault protection. Device and fault configuration parameters
are easily defined using the IR Power Designer GUI and
stored in on-chip non-volatile memory (NVM).
RoHS Compliant, MSL level 2 package
APPLICATIONS
The 3-pin SMBus interface can be used to monitor a variety
of operating parameters on up to seven ASP1212 based
VRs. The controller includes a unique sensorless and
lossless input current monitoring capability.
Intel® VR11.x CPU VRD and VRM; DDR Memory
High Performance Desktops and Servers
Over-clocking and High-Efficiency Application
BASIC APPLICATION
PIN DIAGRAM
12V
ASP1212
PowIR
Stage 1
VR_RDY
VR_HOT
EN
PWM1
VR_RDY_L1
VR_HOT
56 55 54 53 52 51 50 49 48 47 46 45 44 43
RCSP
RCSM
VCC
1
42
41
40
39
38
37
IRTN8
ISEN8
ISEN1
IRTN1
2
ENABLE
3
VOUT
VCC
PowIR
Stage 2
VCPU
4
PWM8
PWM2
SCL
SCL
VRTN
5
PWM7
PWM6
PWM5
PWM4
ASP1212
SADDR/
GAMER_OFF
ISEN2
IRTN2
6
56 Pin
8mmx8mm
QFN
7
36
35
IMON
RRES
SALERT#
PSI#
SALERT#
PSI#
8
TOP VIEW
9
VINSEN
TSEN1
34
33
32
31
PowIR
Stage 3
PWM3
PWM2
PWM1
PWM3
10
11
12
13
14
VID7
GND
TSEN2
TSEN3
EN
VID7 to VID0
ISEN3
IRTN3
NC
30
29
VCC
V18A
PowIR
Stage 8
VAR_GATE
3.3V
VCC
PWM8
15 16 17 18 19 20 21 22 23 24 25 26 27 28
ISEN8
IRTN8
Figure 2: ASP1212 Package Top View
Figure 1: ASP1212 Basic Application Circuit
1
December 16, 2012 | FINAL | V1.06
INFINEON [ Infineon ]
