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IMP1232LP 参数 Datasheet PDF下载

IMP1232LP图片预览
型号: IMP1232LP
PDF下载: 下载PDF文件 查看货源
内容描述: 5VレP电源增刊呃电源Ÿ monit的监测和和和复位巡回ESET电路 [5V レP Power Suppl er Supply Monit y Monitor and or and Reset Cir eset Circuit]
分类和应用: 光电二极管
文件页数/大小: 7 页 / 106 K
品牌: IMP [ IMP, INC ]
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IMP1232LP/LPS  
P
OWER  
M
ANAGEMENT  
Key Features  
5V µP Power Supply Monitor and  
Reset Circuit  
Pin compatible with the Dallas Semiconductor  
DS1232LP/ 1232LPS  
— 40% lower supply current  
– Selectable Trip-Point Tolerance  
and Watchdog Period  
– Push-Button Reset  
5V supply monitor  
Selectable watchdog period  
Debounce manual push-button reset input  
Precision temperature-compensated voltage  
reference and comparator  
Power-up, power-down and brownout detection  
250ms reset time  
Active LOW open-drain reset and active HIGH  
push-pull output  
Selectable trip point tolerance: 5% or 10%  
Low-cost, surface mount packages: 8/ 16-pin  
SO, 8-pin DIP and 8-pin MicroSO  
Wide operating temperature –40°C to +85°C  
The IMP1232LP/ LPS microprocessor supervisor can halt and restart a  
“hung-up” or “stalled” microprocessor, restart a microprocessor after a  
power failure, and debounce and interface a manual push-button micro-  
processor reset switch. The low-power supervisors feature 40% lower  
supply current than the pin compatible Dallas Semiconductor  
DS1232LP/ LPS.  
Precision temperature compensated reference and comparator circuits  
monitor the 5V, V input voltage. During power-up or when the V  
CC  
CC  
power supply falls outside selectable tolerance limits, both the RESET  
and RESET become active. When VCC rises above the threshold voltage,  
the reset signals remain active for an additional 250ms minimum,  
allowing the power supply and system microprocessor to stabilize. The  
trip point tolerance signal, TOL, selects the trip level tolerance to be  
either 5- or 10-percent.  
(N/ EPA suffixed devices)  
Each device has both a push-pull, active HIGH reset output and an open  
drain, active LOW reset output.  
150ms, 610ms and 1,200ms. If the ST input is not strobed  
A debounced manual reset input activates the reset outputs for a mini- LOW before the time-out period expires, a reset is issued.  
mum period of 250ms.  
Devices are available in 8-pin DIP, 8/ 16-pin SO and com-  
Also included is a watchdog timer to stop and restart a microprocessor pact 8-pin MicroSO packages.  
that is “hung-up”. Three watchdog time-out periods are selectable:  
Block Diagram  
8 (15)  
6 (11)  
5 (9)  
VCC  
RESET  
RESET  
IMP1232LP/LPS  
3 (6)  
(16-Pin Package)  
5%/10% Tolerance  
Selection  
TOL  
+
Reference  
VCC  
40k  
1 (2)  
2 (4)  
Push Button  
Debounce  
PBRST  
TD  
Watchdog  
Timebase Selection  
Reset &  
Watchdog Timer  
7 (13)  
Watchdog  
Transition Detector  
ST  
4 (8)  
GND  
408-432-9100/ www.impweb.com  
1232_03.eps  
©
1999 IMP, Inc.  
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