TECHNICAL DATA
IN74HC574A
Octal 3-State
Noninverting D Flip-Flop
High-Performance Silicon-Gate CMOS
N SUFFIX
PLASTIC DIP
The IN74HC574A is identical in pinout to the LS/ALS574. The
device inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
Data meeting the setup time is clocked to the outputs with the rising
edge of the Clock. The OE input does not affect the states of the flip-
flops, but when OE is high, all device outputs are forced to the high-
impedance state; thus, data may be stored even when the outputs are not
enabled.
20
1
DW SUFFIX
SOIC
20
1
ORDERING INFORMATION
IN74HC574AN Plastic DIP
IN74HC574ADW SOIC
IN74HC574ATDS SOIC
•
•
•
•
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 μA
High Noise Immunity Characteristic of CMOS Devices
TA = -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
OE
D0
1
20
V
CC
2
19 Q0
18 Q1
D1
3
17
D2
4
Q2
19
2
Q0
Q1
Q2
Q3
D0
5
D3
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
18
17
16
3
4
D1
D2
D3
D4
6
D5
7
5
6
DATA
INPUTS
NONINVERTING
OUTPUTS
D6
8
15
14
13
12
D4
Q4
Q5
Q6
Q7
9
D7
7
8
9
D5
D6
D7
10
GND
11
CLOCK
11
FUNCTION TABLE
CLOCK
Inputs
Clock
Output
1
OE
L
D
H
L
Q
H
L
OE
PIN 20=VCC
PIN 10 = GND
L
L
L,H,
X
X
no
change
H
X
Z
H= high level
L = low level
X = don’t care
Z = high impedance
Rev. 00
IKSEMICON [ IK SEMICON CO., LTD ]
