TECHNICAL DATA
IN74HC123A
Dual Retriggerable Monostable
Multivibrator
The IN74HC123A is identical in pinout to the LS/ALS123. The
device inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
There are two trigger inputs, A INPUT (negative edge) and
B INPUT (positive edge). These inputs are valid for rising/falling signals.
The device may also be triggered by using the CLR input (positive-
edge) because of the Schmitt-trigger input; after triggering the output
maintains the MONOSTABLE state for the time period determined by the
external resistor RX and capacitor CX. Taking CLR low breaks this
MONOSTABLE STATE. If the next trigger pulse occurs during the
MONOSTABLE period it makes the MONOSTABLE period longer.
ORDERING INFORMATION
IN74HC123AN Plastic
IN74HC123AD SOIC
TA = -55° to 125° C for all packages
•
•
•
•
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 3.0 to 6.0 V
Low Input Current: 1.0 µA
High Noise Immunity Characteristic of CMOS Devices
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
PIN 16 =VCC
PIN 8 = GND
Inputs
Outputs
Note
A
B
H
CLR
H
Q
Q
Note
(1) CX, RX, DX are external components.
(2) DX is a clamping diode.
Output
Enable
The external capacitor is charged to VCC in the stand-by
state, i.e. no trigger. When the supply voltage is turned off
CX is discharged mainly through an internal parasitic diode.
If CX is sufficiently large and VCC decreases rapidy, there
will be some possibility of damaging the I.C. with a surge
current or latch-up. If the voltage supply filter capacitor is
large enough and VCC decrease slowly, the surge current is
automatically limited and damage the I.C. is avoided. The
maximum forward current of the parasitic diode is
approximately 20 mA.
X
H
L
L
H
H
H
L *
L *
H *
H *
Inhibit
Inhibit
X
Output
Enable
L
H
X
Output
Enable
X
L
L
H
Inhibit
X = don’t care
* - except for monostable period
Rev. 00
IKSEMICON [ IK SEMICON CO., LTD ]
